Lead Analog IC Designer

Cadence Design Systems; San Jose (CA); On-site; USD 115,000 - 213,000; Full time

Benefits offered by this job

Paid vacation

401(k) plan with employer match

Employee stock purchase plan

Medical, dental and vision plan

Job summary

Cadence Design Systems seeks an experienced Lead Analog IC Designer to drive the design and development of analog/mixed signal blocks from concept through verification. Candidates should have 3+ years in CMOS SerDes or high-speed I/O, with strong CAD tool proficiency and a track record in advanced node design.

The role offers a competitive salary in California, eligibility for incentive compensation, and comprehensive benefits.

Qualifications

• Minimum of 3 years in CMOS SerDes or high-speed I/O IC design.
• Working knowledge of SerDes standards and electrical requirements is a plus.
• Proficient in analog/mixed-signal circuit design and verification.

Responsibilities

• Design and development of analog/mixed signal IC blocks from concept to verification.
• Collaborate with cross-functional teams to meet customer specs.
• Utilize CAD tools for circuit simulation, layout, and physical verification.
• Contribute to advanced nodes (>112Gbps, <7nm) design efforts.

Skills

Analog IC design

SerDes

High-speed I/O

CMOS

Circuit blocks

Problem solving

Team collaboration

Education

MS in EE

PhD in EE

Tools

CAD tools

Cadence tools

Layout/verification

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job description: The lead Analog IC Designer is responsible for the design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications.

Candidate’s background should include a minimum of 3 years of experience in CMOS SerDes or high-speed I/O IC design and development Working knowledge of a set of common SerDes standards and their electrical requirements is a plus Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; PLL; High Speed Clock Distribution; ADC and DAC; Bias and Bandgap; and Voltage Regulators Excellent problem solving skills, analog aptitude, good communication skills, and ability to work cooperatively in a team environment Position requires proficiency in using CAD tools for circuit simulation, layout, and physical verification Cadence tool experience, lab test experience, and design experience at >112Gbps and in <7nm technologies are a plus MS or PhD in EE.

Our benefits programs include:

• paid vacation and paid holidays
• 401(k) plan with employer match
• employee stock purchase plan
• a variety of medical, dental and vision plan options
• and more

The annual salary range for California is $114,800 to $213,200. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.

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