Lead AI Interconnect Architect for Scale-Out Data Centers

Sandisk

Milpitas (CA)

On-site

USD 180,000 - 240,000

Full time

14 days+

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Job summary

Sandisk seeks an AI Interconnect Architect to define high-speed networking for AI inference infrastructure, including servers, racks, and chips. The role emphasizes bandwidth, power efficiency, scalability, and optimized transport protocols with PCIe, CXL, UALink, and Ultra Ethernet focus.

You will design scale-out architectures, collaborate with SoC, package design, and software teams, and shape industry standards through performance modeling.

Qualifications

  • Master's or PhD in EE/CE/CS as required.
  • 10–15 years developing interconnect technologies including transport, link protocols, switching fabrics, QoS.
  • Familiarity with Fat tree, Leaf-Spine, Torus, and Meshed topologies.
  • Deep knowledge of PCIe, CXL, NVLink, UALink, Ethernet and related protocols.
  • Experience with GPU/accelerator clusters and data center infrastructure.

Responsibilities

  • System Architecture & Design: chip-to-chip interconnects and switched fabrics for AI/ML scale-out.
  • Performance Optimization: analyze bandwidth, latency, power, area, and reliability trade-offs.
  • Technology development and standards: contribute to industry specifications.
  • Cross-functional Collaboration: work with SoC, package design, and software teams.

Skills

AI Hardware Architecture
Data center infrastructure
GPU clusters
Interconnect knowledge
Performance modeling

Education

Master's or Ph.D. in Electrical Engineering, Computer Engineering, or Computer Science

Tools

PCIe
CXL
NVLink
UALink
Ethernet
Ultra-Ethernet
Serial links

Job description

Sandisk seeks an AI Interconnect Architect to define high-speed networking for AI inference infrastructure, including servers, racks, and chips. The role emphasizes bandwidth, power efficiency, scalability, and optimized transport protocols with PCIe, CXL, UALink, and Ultra Ethernet focus.

You will design scale-out architectures, collaborate with SoC, package design, and software teams, and shape industry standards through performance modeling.

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