AI Interconnect Architect - Remote-Ready & Scale-Out

Sandisk; California (MO); On-site; USD 150,000 - 230,000; Full time

Benefits offered by this job

Short-Term Incentive (STI) Plan

Long-Term Incentive (LTI) program with

Employee stock purchase plan

Sandisk 401(k) Plan

Medical/dental/vision insurance

Paid vacation time

Job summary

Sandisk is seeking an AI Interconnect Architect to design high-speed interconnects for AI/ML scale-out, including chip-to-chip and switch fabrics. You will optimize bandwidth, latency, power, and reliability while collaborating with SoC, package, and software teams to ensure seamless integration in data-center infrastructure.

The ideal candidate has 10–15 years of experience in interconnect technologies, familiarity with PCIe, CXL, NVLink, UALink, Ethernet, and network protocols, and advanced

Qualifications

• Master's or Ph.D. in Electrical Engineering, Computer Engineering, or Computer Science.
• 10-15 years experience developing interconnect technologies including transport and link level protocols, switching fabrics, QoS and reliable communication methods, and Software Defined Networking.
• Familiarity with Fat-tree, Leaf-Spine (Clos), Torus, Meshed topologies and their applicability to workloads and system configs.
• AI Hardware Architecture: familiarity with GPU/accelerator clusters and data center infrastructure.
• Deep knowledge of interconnect technologies and protocols such as PCIe, CXL, NVLink, UALink, Ethernet, Ultra-Ethernet, and serial links.
• Modeling and Simulation: ability to develop performance models.

Responsibilities

• System Architecture & Design: Develop architectures for chip-to-chip interconnects and switched fabrics tailored for AI/ML scale-out.
• Performance Optimization: Analyze trade-offs in bandwidth, latency, power, area, and reliability.
• Technology development and standards: Participate in industry standard bodies and influence the direction of industry specifications.
• Cross-functional Collaboration: Work with SoC, package design, and software teams to ensure seamless integration

Skills

AI interconnect arch

PCIe

CXL

NVLink

Ethernet

ULink

Fat-tree topologies

Leaf-Spine

Torus

Education

Master's or PhD in EE/CE/CS

Job description

Sandisk is seeking an AI Interconnect Architect to design high-speed interconnects for AI/ML scale-out, including chip-to-chip and switch fabrics. You will optimize bandwidth, latency, power, and reliability while collaborating with SoC, package, and software teams to ensure seamless integration in data-center infrastructure.

The ideal candidate has 10–15 years of experience in interconnect technologies, familiarity with PCIe, CXL, NVLink, UALink, Ethernet, and network protocols, and advanced