Lead AI Accelerator Hardware Architect

Normal Computing; United States; On-site; USD 180,000 - 260,000; Full time

Job summary

Normal Computing is seeking a Hardware Lead Architect to define the silicon and system microarchitecture for our unconventional AI accelerator, targeting orders of magnitude energy efficiency gains for LLM and diffusion workloads.

You will translate transformer workloads into compute tiles, memory hierarchies, and interconnects, and lead hardware/software co-design with RTL, compiler, and analog teams to maximize throughput per watt.

Qualifications

• Experience with Python or C++ for performance modeling and analysis.
• Proficiency with SystemVerilog/RTL and simulation-driven architecture.
• Ability to read and translate workload profiles into datapath widths, pipelines, and area/power estimates.

Responsibilities

• Define silicon and system microarchitecture for AI accelerator blocks and compute tiles.
• Lead HW/SW co-design across RTL, compiler, and analog teams.
• Build performance models and microarchitectural specifications for RTL implementation.
• Prototyping and pre-silicon validation planning with RTL and FPGA teams.

Skills

Python

C++

SystemVerilog

RTL

Performance Modeling

Microarchitecture

Education

Electrical Engineering

Computer Engineering

Computer Science

Job description

Normal Computing is seeking a Hardware Lead Architect to define the silicon and system microarchitecture for our unconventional AI accelerator, targeting orders of magnitude energy efficiency gains for LLM and diffusion workloads.

You will translate transformer workloads into compute tiles, memory hierarchies, and interconnects, and lead hardware/software co-design with RTL, compiler, and analog teams to maximize throughput per watt.