Lead Hardware Architect: AI Accelerator & Efficient Compute

Drive Capital; Palo Alto (CA); On-site; USD 260,000 - 360,000; Full time

Job summary

Normal Computing is seeking a Hardware Lead Architect to design silicon and system microarchitecture for a novel AI accelerator platform, targeting large energy-efficiency gains for LLM and diffusion workloads. You will translate workloads into hardware specs, drive cross-team validation with RTL and analog groups, and optimize the full stack from datapath to power under tight tapeout timelines.

The role requires strong background in digital architectures, quantization, and performance modeling,

Qualifications

• Degree in Electrical/Computer Engineering, CS, or equivalent.
• Experience in architecture or microarchitecture of high-performance digital systems (AI accelerators, compute engines).
• Fluency in translating workloads to datapath widths, pipelines, and power estimates.
• Experience with simulation-driven architecture and cycle-accurate models.
• Familiarity with quantization and reduced-precision approaches for inference.
• Experience writing microarchitecture specifications and collaborating with RTL engineers.
• Proficiency in Python or C++ for performance modeling; familiarity with SystemVerilog.

Responsibilities

• Define AI accelerator compute blocks' architecture and datapath.
• Translate workload analysis into hardware specifications for RTL.
• Defend full-stack PPA tradeoffs across algorithm, memory, interconnect and physical design.
• Collaborate on ISA co-design with the compiler lead.
• Lead pre-silicon prototyping strategy with FPGA teams and de-risk tapeout.
• Stay current with AI accelerator research and articulate differentiators.

Skills

Architecture design

Simulation-driven design

Python or C++ modeling

SystemVerilog familiarity

Quantization/reduced-precision

Workload-to-hardware translation

Education

Bachelor's degree in Electrical/Computer Engineering or equivalent

Tools

SystemVerilog

RTL tooling

Job description

Normal Computing is seeking a Hardware Lead Architect to design silicon and system microarchitecture for a novel AI accelerator platform, targeting large energy-efficiency gains for LLM and diffusion workloads. You will translate workloads into hardware specs, drive cross-team validation with RTL and analog groups, and optimize the full stack from datapath to power under tight tapeout timelines.

The role requires strong background in digital architectures, quantization, and performance modeling,