AI Compute Architect — Next-Gen Silicon for GenAI

MatX Inc.; Mountain View (CA); Hybrid; USD 120,000 - 600,000; Full time

Benefits offered by this job

4 weeks PTO (accrued) + holidays + up‑

Hybrid work environment

Annual professional development budget

Relocation stipend (if applicable)

Company-subsidized health & dental

Job summary

MatX Inc. in Mountain View, CA is seeking an AI Accelerator Compute Architect to define the compute architecture for next-generation GenAI accelerators. You will translate workloads into hardware architecture and evaluate ISA, memory, and interconnect tradeoffs.

Join a cross-functional team and help deliver efficient silicon with strong latency, throughput, and power performance. The role blends research, software, and hardware collaboration with hands-on bring-up and post-silicon debugging.

Qualifications

• Strong background in computer architecture, especially AI accelerators, GPUs, TPUs, vector processors, SIMD, VLIW, or other parallel compute architectures.
• Experience translating workloads into hardware architecture.
• Solid microarchitecture fundamentals.
• First-principles understanding of latency, throughput, utilization, and scalability.
• Familiarity with numeric formats, quantization, rounding, and precision/performance tradeoffs.
• Programming, code optimization, or kernel-level performance analysis experience.
• Excellent written and verbal communication skills.
• Familiarity with performance-optimization techniques in large-scale transformer models is a plus.

Responsibilities

• Define the architecture for MatX’s AI compute subsystem, including ISA, connectivity, memories, and control.
• Derive architectural requirements from AI use cases.
• Conduct analytical and empirical performance analysis.
• Collaborate closely with Research, SW, and HW teams to ensure optimized silicon for workloads and programmability.
• Work through power, area, and performance tradeoffs with stakeholders.
• Support test plan reviews, first-silicon bring-up, and post-silicon debug.

Skills

AI accelerator architecture

Parallel compute architectures

Performance analysis

Workloads to hardware mapping

Latency/throughput optimization

Programming/kernel performance

Job description

MatX Inc. in Mountain View, CA is seeking an AI Accelerator Compute Architect to define the compute architecture for next-generation GenAI accelerators. You will translate workloads into hardware architecture and evaluate ISA, memory, and interconnect tradeoffs.

Join a cross-functional team and help deliver efficient silicon with strong latency, throughput, and power performance. The role blends research, software, and hardware collaboration with hands-on bring-up and post-silicon debugging.