Lead Advanced-Node Physical Design Engineer

Advanced Micro Devices; Santa Clara (CA); Hybrid; USD 170,000 - 230,000; Full time

Benefits offered by this job

AMD benefits

Job summary

Advanced Micro Devices (AMD) is seeking a hands-on physical design leader to drive full‑stack ASIC/SoC implementation for next‑gen AI and HPC products. You will guide block, subsystem and chip‑level work, optimize timing, and advance design flows with automation to deliver high‑quality silicon.

You will collaborate with architecture, RTL, CAD and product teams while mentoring engineers and promoting data‑driven design solutions in a fast‑paced environment. This hybrid role offers AMD benefits.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field is required.
• Hands-on experience with ASIC physical design, implementation, and timing closure is required.
• Experience with block-, subsystem-, and chip-level design environments is preferred.

Responsibilities

• Lead physical design activities across block, subsystem, and chip-level implementations.
• Drive timing closure, signoff readiness, and PPA optimization for advanced-node designs.
• Develop and enhance physical design methodologies, design flows, and automation solutions.
• Perform static timing analysis, variation-aware timing analysis, and clock-tree optimization.
• Define and execute ECO strategies throughout implementation and signoff.
• Support formal verification, physical verification, and tapeout preparation activities.
• Analyze design data and trends to improve design quality, predictability, and efficiency.
• Collaborate with cross-functional teams to deliver silicon.
• Contribute to AI-assisted and machine learning-driven design optimization initiatives.
• Troubleshoot complex implementation challenges and develop scalable technical solutions.

Skills

ASIC physical design

Timing closure

EDA tooling

Python scripting

Education

Bachelor's or Master's degree in Electrical/Computer Engineering

Tools

Synopsys ICC2

Fusion Compiler

Cadence Innovus

PrimeTime/PrimeTime PX

PrimeShield

RedHawk

Formality

Conformal

Job description

Advanced Micro Devices (AMD) is seeking a hands-on physical design leader to drive full‑stack ASIC/SoC implementation for next‑gen AI and HPC products. You will guide block, subsystem and chip‑level work, optimize timing, and advance design flows with automation to deliver high‑quality silicon.

You will collaborate with architecture, RTL, CAD and product teams while mentoring engineers and promoting data‑driven design solutions in a fast‑paced environment. This hybrid role offers AMD benefits.