Junior VLSI Verification Engineer

proteanTecs; United States; On-site; USD 90,000 - 120,000; Full time

Job summary

proteanTecs is seeking a Junior VLSI Verification Engineer to join our team in the US. You will contribute to on-chip health monitoring and verification of IP blocks, collaborating with design and software teams on ambitious projects.

Ideal candidates have a BSc in EE/CS and 1–2 years of VLSI verification, with hands-on SystemVerilog and UVM knowledge, plus familiarity with simulation tools and code coverage concepts. You’ll grow your skills in a fast-paced startup environment.

Qualifications

• BS degree in EE/CS or related field is required.
• 1–2 years in VLSI verification.
• Experience with SystemVerilog/UVM and basic digital design concepts.

Responsibilities

• Develop, debug, and maintain verification environments and testbenches.
• Analyze simulation results and waveforms to root-cause issues.
• Define and track code and functional coverage; drive closure.
• Verify IP blocks end-to-end from test planning to sign-off.
• Collaborate with design team to clarify specs and confirm completeness.
• Participate in code reviews and knowledge sharing to improve practices.

Skills

SystemVerilog

UVM

RTL design

Testbench architecture

Simulation flow

Python

Git

VCS

Questa

Xcelium

Code coverage

AXI/APB/I2C/SPI

Education

B.Sc. in Electrical/Computer Engineering

B.Sc. in Computer Science

Related field

Tools

VCS

Xcelium

Questa

Job description

**Chips Talk, We Listen**

proteanTecs is a game-changing startup that’s giving advanced electronics the power to report on their own health. In a digital world built for autonomous driving, cloud computing, and AI, we depend on computing systems daily. But how can we guarantee their safety, reliability and functionality? proteanTecs is the first-ever company to provide visibility into next‑gen chips while they are operating, based on the power of on‑chip monitoring, machine learning, and data analytics.

Here at proteanTecs, you’ll be part of a team that’s unlocking deep insights to make electronics more reliable, efficient, and high‑quality. We’re trusted by industry leaders in data centers, automotive, communications, and consumer devices – we work with the world’s largest and most notable companies in tech.

**Why proteanTecs is a great place to work:**

• **Fast-paced and impactful:** We’re a mission‑driven startup, so you’ll tackle new challenges daily, wear many hats, and see your work directly influence the future of electronics.
• **Supportive company culture**: Learn from the best. Our 200 team members are experts in their field with a proven track record of success, and they’re committed to fostering a collaborative and supportive work environment.
• **International presence:** We’re a multinational company with a diverse team across multiple locations around the globe. You’ll collaborate on projects with international impact, gaining a global perspective of the tech industry.
• **Work with industry leaders:** Our solutions are used by the biggest names in tech. You’ll be part of the team creating the next generation of groundbreaking products.
• **Cutting‑edge playground:** We use the latest machine learning, platforms, and tools to push boundaries and achieve breakthroughs.
• **Real‑world impact:** Our work keeps data centers, cars, and other critical systems running smoothly. Your work will directly contribute to safer, more reliable electronics.
• **We are here for the win:** Backed by industry veterans and leading investors, we offer a stable and secure work environment with plenty of room for growth.

proteanTecs is looking for a**Junior VLSI Verification Engineer** to join the ride as we spearhead the next revolution in electronics!

• B.Sc. in Electrical/Computer Engineering, Computer Science, or a related field.
• 1‑2 years of experience in VLSI verification.
• Working knowledge of SystemVerilog and UVM fundamentals .
• Basic understanding of digital design and verification concepts (RTL structure, testbench architecture, simulation flow).
• Strong problem‑solving skills, curiosity, and eagerness to learn new tools and methodologies.
• Detail‑oriented approach and solid communication skills; comfortable asking questions and collaborating within a team.

**Advantages**

• Basic Python skills for scripting and test automation.
• Familiarity with Git or other version control systems.
• Hands‑on experience with simulation tools such as VCS, Xcelium, or Questa.
• Understanding of coverage concepts (code coverage, functional coverage).
• Familiarity with common bus/interface protocols (e.g., AXI, APB, I2C, SPI).

• Develop, debug, and maintain verification environments and testbenches using SystemVerilog and UVM.
• Analyze simulation results and waveforms to identify, isolate, and root‑cause bugs in design or testbench code.
• Define, track, and analyse code and functional coverage metrics, and drive coverage closure on assigned blocks.
• Own the verification of assigned IP blocks or features end‑to‑end, from test planning through sign‑off.
• Collaborate with the design team to clarify specifications and confirm verification completeness.
• Escalate complex or ambiguous issues to senior engineers when needed, and incorporate their feedback to sharpen debug skills over time.
• Participate in code reviews and team knowledge‑sharing sessions to build best practices and technical depth.