Junior RTL Design Engineer for ASIC & FPGA

HVAC Total FM Recruitment; Pennsylvania; On-site; USD 75,000 - 100,000; Full time

Job summary

Microchip Technology Inc. in the United States is seeking an RTL/ASIC engineer to design, simulate, and verify RTL-based blocks on our devices.

You will work within an SOC environment containing IP blocks and support standard protocols for imaging, networking, compute and data storage. You will participate in RTL implementation, synthesis, timing verification, and design specification creation, with opportunities to port designs to test chips and emulation platforms; FPGA experience is a plus.

Qualifications

• Bachelor’s degree in Electrical/Computer Engineering or Computer Science.
• Course work and practical use in high-speed RTL design and verification.
• Proficiency in SystemVerilog and Verilog; scripting in TCL/Perl/Python.

Responsibilities

• General RTL and ASIC development.
• Detailed module design, performance analysis and design specs.
• RTL implementation, synthesis, simulation, timing verification.

Skills

RTL Design

SystemVerilog

Verilog

Python

TCL

Perl

Self-motivated

Team player

Education

Bachelor’s in Electrical Engineering, Computer Engineering or Computer Science

Master’s in Electrical Engineering, Computer Engineering or Computer Science

Tools

RTL Design Tools

Synthesis

Formal Verification

RTL/ gate level Simulation

Static Timing Analysis

Linux

FPGA Tools

Job description

Microchip Technology Inc. in the United States is seeking an RTL/ASIC engineer to design, simulate, and verify RTL-based blocks on our devices.

You will work within an SOC environment containing IP blocks and support standard protocols for imaging, networking, compute and data storage. You will participate in RTL implementation, synthesis, timing verification, and design specification creation, with opportunities to port designs to test chips and emulation platforms; FPGA experience is a plus.