Entry-Level RTL/ASIC Design Engineer

Microchip Technology Inc.; Allentown (Lehigh County); On-site; USD 70,000 - 110,000; Full time

Job summary

Microchip Technology Inc. in Allentown, PA is seeking an entry-level RTL Design engineer to design, simulate, and verify RTL blocks in an SOC with standard interfaces.

You will work on high-speed RTL design, timing verification, and porting designs to test chips and emulation platforms. The role requires 0–2.5 years of RTL design experience and a Bachelor's in EE/CE/CS, with proficiency in SystemVerilog, Verilog, and scripting languages.

Qualifications

• 0–2.5 years of RTL Design for ASIC implementation.
• Bachelor’s in Electrical/Computer Engineering or Computer Science.
• Design courses and practical application for high-speed RTL design.

Responsibilities

• General RTL and ASIC development.
• Design, simulate, and verify RTL blocks and timing.
• Support porting designs to test chips and emulation platforms.

Skills

RTL design

SystemVerilog

Verilog

Python

TCL

Perl

Linux

Education

Bachelor's in EE/CE/CS

Tools

RTL Design tools

FPGA tools

Job description

Microchip Technology Inc. in Allentown, PA is seeking an entry-level RTL Design engineer to design, simulate, and verify RTL blocks in an SOC with standard interfaces.

You will work on high-speed RTL design, timing verification, and porting designs to test chips and emulation platforms. The role requires 0–2.5 years of RTL design experience and a Bachelor's in EE/CE/CS, with proficiency in SystemVerilog, Verilog, and scripting languages.