Innovative FPGA Design Engineer II

globalhr; Tewksbury (MA); Presencial; USD 69.000 - 131.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Medical benefits

Dental benefits

401(k) match

Descripción de la vacante

RTX is seeking an FPGA Design Engineer II for on-site roles in MA (TEWKSBURY or Marlborough). You will develop VHDL-based FPGA designs for gigabit interfaces, RF/EO DSP, and embedded processing, collaborating with circuit card designers and systems engineers throughout requirements and verification.

The role emphasizes formal documentation and design reviews. Responsibilities include creating production-ready FPGA releases, translating system requirements to FPGA specifications, and performing

Formación

• Typically requires a STEM degree and 2+ years of relevant FPGA/Design experience.
• Experience with FPGA/ASIC design in system-level applications preferred.
• Hands-on integration and debugging of FPGA/ASIC devices.

Responsabilidades

• Design and deliver production-quality FPGA releases from concept to production.
• Architect FPGA-based systems determining parts, interfaces, and CONOPS.
• Translate system requirements into FPGA requirements and code in VHDL.
• Verify designs with directed and constrained-random tests and track coverage.
• Document requirements, verification plans, and user guides.

Conocimientos

VHDL coding

FPGA design

Digital design

Xilinx/Altera tools

SystemVerilog/UVM

Educación

STEM degree

Herramientas

Xilinx tools

Altera tools

VHDL simulators

Emulation platforms (Veloce)

Descripción del empleo

RTX is seeking an FPGA Design Engineer II for on-site roles in MA (TEWKSBURY or Marlborough). You will develop VHDL-based FPGA designs for gigabit interfaces, RF/EO DSP, and embedded processing, collaborating with circuit card designers and systems engineers throughout requirements and verification.

The role emphasizes formal documentation and design reviews. Responsibilities include creating production-ready FPGA releases, translating system requirements to FPGA specifications, and performing