Senior Design Verification Engineer — Emulation, UVM & AMS (Hybrid)

Lightmatter; Mountain View (CA); Hybrid; USD 196,000 - 257,000; Full time

Benefits offered by this job

Health care plan

Retirement match

Life insurance

Time off

Equity grants

Hybrid workplace

Job summary

Lightmatter is hiring a Design Verification Engineer in Mountain View to advance verification across digital, analog, and photonic devices using UVM and emulation. You will work with digital and photonic designers to define robust validation flows and scalable test bench components to ensure high coverage.

The role offers collaboration with Architecture and DV teams, exposure to post-silicon validation and AMS verification, and a hybrid work model in a cutting-edge photonics-enabled data center

Qualifications

• Minimum of 8 years of design verification and SystemVerilog experience.
• 2+ years of Python experience.
• Expertise with UVM library.
• Experience with simulators such as Xcelium, ModelSim, Questa, or VCS.
• Strong problem solver and collaborator.

Responsibilities

• Define and enhance DV methodologies for digital, analog, and photonic devices with emphasis on emulation.
• Create and execute test plans to meet functional and performance goals.
• Collaborate with architects, DV engineers, digital designers, and photonics designers to define validation flows.
• Create reusable test bench components for efficient verification.
• Close coverage and finish DV signoff requirements with mixed-signal simulations.

Skills

SystemVerilog

UVM

Python

AMS verification

Collaboration

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field

Master’s degree preferred

Tools

Xcelium

ModelSim

Questa

VCS

Job description

Lightmatter is hiring a Design Verification Engineer in Mountain View to advance verification across digital, analog, and photonic devices using UVM and emulation. You will work with digital and photonic designers to define robust validation flows and scalable test bench components to ensure high coverage.

The role offers collaboration with Architecture and DV teams, exposure to post-silicon validation and AMS verification, and a hybrid work model in a cutting-edge photonics-enabled data center