IC Packaging Integration Engineer

Apple Inc.; Santa Clara (CA); On-site; USD 150,000 - 210,000; Full time

Job summary

Apple Inc. in Santa Clara, CA, is seeking a senior IC packaging engineer to lead packaging development for SoCs. You will collaborate with cross-functional teams to drive advanced package solutions, new materials, and reliability across designs.

The role requires BS plus 10+ years in semiconductor packaging, with preference for MS/PhD and expertise in FOWLP/2.5D/3D, Allegro schematics review, and data analytics to optimize yield and performance.

Qualifications

• BS and 10+ years of relevant industry experience.
• Experience in semiconductor packaging and system integration.
• Specialist in advanced packaging technologies (FOWLP/2.5D/3D) with high density interconnects.

Responsibilities

• Work with cross-functional domains through package definition process and deliver optimized solutions to meet electrical, mechanical, thermal requirements.
• Test vehicle definition and execution with foundries and OSATs for advanced packaging technologies (FOWLP, 2.5D, 3D, coreless MCM).
• DOE principles and statistical analyses to establish robust build plans for OSATs through NPI phase.
• Lead package failure analysis and root cause investigations across multiple domains (wafer level processes, assembly, substrate).
• Apply advanced AI/ML and data analytics techniques to convert complex datasets into actionable insights that drive process optimization and yield improvement.

Skills

Problem solving

Communication skills

Analytical thinking

Allegro review

Education

BS in a relevant field

MS/PhD in related field

Tools

Allegro

Job description

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Description

• You will be responsible for IC packaging development.
• Work with cross-functional teams and lead SoC Package integration and architecture efforts.
• Drive the industry with advanced package solutions, new material developments, and specs.

Responsibilities

• Work with cross-functional domains through package definition process and deliver optimized solutions to meet electrical, mechanical, thermal requirements.
• Test vehicle definition and execution working alongside foundries and OSATs for advanced packaging technologies (FOWLP, 2.5D, 3D, coreless MCM).
• Well versed with DOE principles and statistical analyses to establish robust build plans for OSATs through NPI phase.
• Lead package failure analysis and root cause investigations across multiple domains (wafer level processes, assembly, substrate), process excursions, and drive efficient issues resolution.
• Apply advanced AI/ML and data analytics techniques to convert complex foundry and OSAT datasets into actionable insights that drive process optimization and yield improvement.

Minimum Qualifications

• BS and 10+ years of experience in relevant industry experience.

Preferred Qualifications

• MS/PhD and 6+ years of experience in relevant industry.
• Someone experienced in the semiconductor packaging and/or system integration.
• Good understanding of multi-functional packaging areas: package layout and architecture, enabling process technologies, thermal, mechanical, SI/PI, material, component & system level reliability, testing, FA and package-system integration.
• Specialist in advanced packaging technologies (FOWLP/2.5D/3D): Knowledge and insight to deliver high density / high performance interconnects in various form factor, thermo‑mechanical, reliability, and cost constraints.
• Excellent problem solving with strong physics and fundamentals.
• Excellent communication skills that enable the candidate to work well with internal cross‑functional teams and overseas suppliers.
• Basic knowledge of signal integrity/power integrity.
• Ability to review schematics, package/PCB layout and designs in Allegro.

Apple accepts applications to this posting on an ongoing basis.