IC Packaging Engineer - WLP

Socket.dev; California (MO); On-site; USD 90,000 - 130,000; Full time

Job summary

Socket.dev is seeking an IC Packaging Engineer to contribute to package concept exploration and configuration studies. You will support prototype evaluations and drive process development toward MP readiness, partnering with design, test, reliability, and product teams as well as foundry and OSAT partners.

Join a team that values curious, detail-oriented engineers who can grow into end-to-end ownership of characterization, modeling, and failure analysis across SoC packaging projects.

Qualifications

• Bachelor's degree required in a relevant field.
• Familiarity with wafer level packaging, 2.5D/3D packaging, and reliability standards.
• Experience or internship in semiconductor packaging environments is preferred.

Responsibilities

• Support package concept exploration and configuration studies.
• Assist prototype evaluations and process development toward mass-production readiness.
• Collaborate with design, test, reliability, and product teams, plus foundry and OSAT partners.
• Grow into end-to-end ownership of deliverables across characterization, modeling and FA.

Skills

Cross-functional collaboration

Engineering physics fundamentals

Independent project management

Strong problem solving

Education

Bachelor's degree in a relevant field

Tools

SEM

EDX

CSAM

FTIR

DMA

TMA

Job description

DESCRIPTION

Do you like to work on groundbreaking technology? Have a passion for creating amazing products? Our team is looking for a curious, detail-oriented IC Packaging Engineer, with a strong technical foundation and a love for excellence and precision, to help deliver extraordinary results. In this role, you will contribute to package concept exploration, support package selection and configuration studies, and grow into ownership of package integration across SoC and advanced packaging projects.

Join our WLP team and help develop next-generation Wafer Level Packaging and 2.5D / 3D solutions. You'll start by supporting package concept exploration, selection and configuration studies, and prototype evaluations, while contributing to process development efforts that mature packaging solutions toward mass-production (MP) readiness on product. You'll partner with design, test, reliability, and product teams as well as foundry and OSAT partners, and grow over time into end-to-end ownership of well-scoped deliverables across characterization, modeling, and failure analysis. We're looking for a curious, detail-oriented engineer with strong fundamentals, a passion for precision, and the drive to learn quickly and solve hard problems.

MINIMUM QUALIFICATIONS

• Minimum requirement of a bachelors degree

PREFERRED QUALIFICATIONS

• MS or PhD in a relevant discipline, with a thesis or coursework in semiconductor packaging, materials, thermal, mechanical, or electrical modeling Internship or research experience with a semiconductor company, OSAT, foundry, or academic packaging/materials lab. Familiarity with one or more of: Wafer Level Packaging, 2.5D / 3D packaging, memory packaging, assembly processes, IC packaging materials, or reliability standards. Exposure to materials characterization tools (SEM, EDX, CSAM, FTIR, DMA, TMA, etc.) or FA techniques, ideally on wafer level General understanding of wafer level packaging technologies, assembly processes, IC packaging materials, reliability standards, FA techniques, etc.
• Excellent interpersonal skills and has strong business partnership building and collaboration with multi-functional teams and overseas suppliers
• Ability to work independently and orchestrate projects with cross functional teams
• Solution-oriented mindset with strong fundamentals in engineering physics
• Good program management skills.