IC Layout Engineer — CMOS/FinFET for High‑Speed IP

MediaTek; Irvine (CA); On-site; USD 85,900 - 137,500; Full time

Benefits offered by this job

Comprehensive health insurance

401K plan

Paid time off (PTO)

Job summary

MediaTek in Irvine, California, seeks a skilled engineer to design high-quality layouts for various semiconductor products. Candidates should be proficient in Virtuoso and Calibre tools, with experience in high-speed circuits and knowledge of N7/N5/N3 processes. The role offers a salary range of $85,900 - $137,500 plus potential performance bonuses. Comprehensive health benefits and a 401K plan are included.

Qualifications

• Proficient in Virtuoso and Calibre tools.
• Familiar with validating LVS/DRC/ERC/ANT/ESD/LPE.
• Experience with high-speed circuits, hybrid circuits, low-dropout regulators, phase-locked loops, and basic ESD knowledge.
• Knowledge of N7/N5/N3 processes.

Responsibilities

• Work closely with the design team to develop high-quality layouts.
• Perform layout in CMOS or FinFET technologies.
• Design layout, verification, and parasitic extraction.

Skills

Proficient in Virtuoso and Calibre tools

Validating LVS/DRC/ERC/ANT/ESD/LPE

Experience with high-speed circuits

Tools

Cadence design environment

Job description

MediaTek in Irvine, California, seeks a skilled engineer to design high-quality layouts for various semiconductor products. Candidates should be proficient in Virtuoso and Calibre tools, with experience in high-speed circuits and knowledge of N7/N5/N3 processes. The role offers a salary range of $85,900 - $137,500 plus potential performance bonuses. Comprehensive health benefits and a 401K plan are included.