IC Layout engineer

MediaTek Research Lab Inc.; Irvine (CA); On-site; USD 85,900 - 137,500; Full time

Benefits offered by this job

Comprehensive health insurance

401(k) plan

Paid time off (PTO)

Job summary

MediaTek Research Lab Inc. is looking for an Analog Layout Engineer in Irvine, California. The role involves developing high-quality layouts for data-converters and power management circuitry, and performing layout in CMOS or FinFET technologies.

Candidates should be proficient in Virtuoso and Calibre tools, with experience in high-speed circuits, and knowledge of N7/N5/N3 processes. Competitive compensation and benefits are offered, including health insurance and a 401(k) plan.

Qualifications

• Proficient in Virtuoso and Calibre tools.
• Familiar with validating LVS/DRC/ERC/ANT/ESD/LPE.
• Layout experience in high-speed circuits, hybrid circuits, low-dropout regulators, phase-locked loops and ESD.
• Knowledge of N7/N5/N3 processes.

Responsibilities

• Work closely with the design team to develop high-quality layouts for various IP.
• Perform layout in CMOS or FinFET technologies for high-speed front ends.
• Design layout, verification, parasitic extraction using the Cadence design environment.

Skills

Proficient in Virtuoso and Calibre tools

Validating LVS/DRC/ERC/ANT/ESD/LPE

Layout experience in high-speed circuits

Knowledge of N7/N5/N3 processes

Job description

MediaTek Incorporated is a global fabless semiconductor company that enables nearly 2 billion connected devices a year. We are a market leader in developing innovative systems‑on‑chip (SoC) for mobile devices, automotive, home entertainment, connectivity and IoT products. Our dedication to innovation has positioned us as a driving market force in several key technology areas, including highly power‑efficient mobile technologies, automotive solutions and a broad range of advanced multimedia products such as smartphones, tablets, digital televisions, 5G, Voice Assistant Devices (VAD) and wearables. MediaTek empowers and inspires people to expand their horizons and achieve their goals through smart technology, more easily and efficiently than ever before. We work with the brands you love to make great technology accessible to everyone, and it drives everything we do. Visit www.mediatek.com for more information.

Position

Analog Layout Engineer, Analog Design and Circuit Technology, Irvine, California.

Responsibilities

• Work closely with the design team to develop high‑quality layouts for product, data‑converters, power management circuitry, and various other IP.
• Perform layout in CMOS or FinFET technologies for high‑speed front ends, ADCs, DACs, PLLs and other mixed‑signal IP.
• Design layout, verification, parasitic extraction using the Cadence design environment.

Main Requirements and Qualifications

• Proficient in Virtuoso and Calibre tools.
• Familiar with validating LVS/DRC/ERC/ANT/ESD/LPE.
• Layout experience in high‑speed circuits, hybrid circuits, low‑dropout regulators, phase‑locked loops and ESD.
• Knowledge of N7/N5/N3 processes.

Compensation and Benefits

• Salary range: $85,900 – $137,500.
• Employee may be eligible for performance bonus, short‑ and long‑term incentive programs. Total compensation will depend on skills, experience, and qualifications.
• Benefits include comprehensive health insurance coverage, life and disability insurance, savings plan, company paid holidays, paid time off (PTO), parental leave, 401(k) and more.

MediaTek is an Equal Opportunity Employer committed to inclusion and diversity of all, regardless of age, ancestry, color, disability, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (including pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.