I/O Architect, Chiplet Systems — Lead ASIC Design

Eliyan; San Francisco (CA); On-site; USD 150,000 - 200,000; Full time

Benefits offered by this job

Fun work environment

Excellent benefits

Job summary

A leading chiplet startup is looking for a NuLink PHY IO Architect to define and develop cutting-edge ASICs. In this role, you will lead architecture design, collaborate with industry experts, and ensure compliance with standards. Required qualifications include 8+ years of experience, a degree in Electrical or Computer Engineering, and expertise in connectivity protocols such as PCIe and UCIe. Join our energetic team and work onsite from Monday to Friday while enjoying excellent benefits.

Qualifications

• 8+ years of experience in ASIC architecture and protocol implementation.
• Strong scripting and automation skills.
• Expertise in chip micro-architecture.

Responsibilities

• Define NuLink PHY subsystems and hierarchical modular protocol bridges.
• Design protocol conversion layers and performance evaluation.
• Mentor engineers and collaborate with cross-functional teams.

Skills

Expertise in architecture definition

Knowledge of PCIe, UCIe, Ethernet

Scripting and automation capabilities

Education

Bachelor’s or Master’s in Electrical Engineering

Job description

A leading chiplet startup is looking for a NuLink PHY IO Architect to define and develop cutting-edge ASICs. In this role, you will lead architecture design, collaborate with industry experts, and ensure compliance with standards. Required qualifications include 8+ years of experience, a degree in Electrical or Computer Engineering, and expertise in connectivity protocols such as PCIe and UCIe. Join our energetic team and work onsite from Monday to Friday while enjoying excellent benefits.