Hybrid High-Speed SerDes Design Engineer — San Jose

Cisco Systems, Inc.; San Jose (CA); Hybrid; USD 180,000 - 260,000; Full time

Job summary

Cisco Systems, Inc. is hiring for a Hybrid Mixed-Signal IC Design role in San Jose, CA. You will architect, design, layout, measure and productize ultra-deep sub-micron CMOS products, leading a block on a complex chip and mentoring teammates.

Collaboration with packaging and hardware teams ensures signal and power integrity throughout. You should have a strong background in high-speed ICs, PLLs, opamps, equalization and high-speed data links, with a track record of delivering high-quality analog

Qualifications

• Minimum education: as stated (Bachelor's +8, Master's +6, or PhD +3 years of related experience).
• Experience in design, simulation and measurement of high speed ICs in multiple listed areas.
• Strong background in high speed AMS circuits and mixed-signal design.

Responsibilities

• Lead a large block on a complex IC and mentor teammates.
• Design, layout, measure and productize ultra-deep sub-micron CMOS designs.
• Collaborate with packaging and hardware teams on signal/power integrity.

Skills

High Speed Links

System simulations

OPAMPs & PGA

Clock distribution

PLL design

EM/AMS layouts

Signal integrity

Education

Bachelors + 8 yrs exp / Masters + 6 yrs exp / PhD + 3 yrs exp

Tools

Cadence Virtuoso

Spectre APS/SpectreX

Calibre

EMX

MATLAB

Job description

Cisco Systems, Inc. is hiring for a Hybrid Mixed-Signal IC Design role in San Jose, CA. You will architect, design, layout, measure and productize ultra-deep sub-micron CMOS products, leading a block on a complex chip and mentoring teammates.

Collaboration with packaging and hardware teams ensures signal and power integrity throughout. You should have a strong background in high-speed ICs, PLLs, opamps, equalization and high-speed data links, with a track record of delivering high-quality analog