High Speed Interface Protocols, Principal AE

Cadence

San Jose (CA)

On-site

USD 123,200 - 228,800

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Job summary

Cadence is seeking a Principal Applications Engineer to architect high-speed interface solutions (PCIe, CXL, Ethernet, USB) for customers using Cadence Serdes IP. You will drive technical presales, define internal processes and lead initiatives to improve team productivity and grow the IP business.

This is a customer-facing role combining technical growth with business acumen across data centers and mobile devices.

Qualifications

  • BS in EE/CE with 15+ years experience or MS with 10+ years experience
  • Knowledge of PCIe, CXL, UCIe, Ethernet, USB, MIPI, 224G, 112G protocols
  • Strong knowledge of PHY and/or controllers for high-speed interface protocols
  • Leadership and initiative to manage pre-sales accounts
  • Excellent presentation and verbal/written communication skills

Responsibilities

  • Technical presales and configuration of High-Speed Interface IP including PCIe, CXL and Ethernet PHY/Controllers
  • Present Cadence IP portfolio to prospective customers
  • Serve as a product expert in digital controller and PHY IPs and protocols
  • Collaborate with IP Sales, marketing and R&D to win opportunities
  • Demonstrate IP performance at industry events and with customers
  • Provide quick-turn product-specific technical support to customers and field teams
  • Write application notes/articles for internal/external publication
  • Travel to customer sites may be required occasionally

Skills

High-speed interface protocols
Pre-sales leadership
Customer-facing communication
Presentation skills

Education

B.S. in EE/CE or related field

Tools

AXI/PIPE knowledge
PHY verification basics

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

The Cadence IP team develops industry leading IPs that enable customers in a variety of markets—from the endpoint to the edge to the cloud. At Cadence we’re helping set the standard on IP products that get integrated in SoCs that power the world’s Data Centers, Automobiles, Cloud and Wireless Systems. We offer amazing opportunities to grow, no matter where you are in your career.

We are growing our Serdes Applications team and we are looking for smart, energetic, collaborative and creative people to help us lead the industry with our IP products. At Cadence, we believe in embracing diverse ideas and striving for excellence in all that we do. Do you want to make a difference and be challenged? Join the High‑Performance Culture at Cadence.

As a Principal Applications Engineer, you will use your knowledge of different high‑speed interface standards such as PCIe, CXL, Ethernet and USB to architect interface solutions for customers using Cadence Serdes IP and showcase the performance of the IP. You will also define internal processes and lead initiatives to improve team productivity and grow the IP business. This is a customer facing role that offers the benefit of both technical growth and business skill development. You will be part of the Technical Field Organization helping educate customers and providing solutions to them using our Serdes IP portfolio. Our serial interface PHY and controller IPs are used in data centers, mobile devices, automobiles and consumer devices.

Responsibilities
  • Technical presales and configuration of High‑Speed Interface IP, including PCIe, CXL and Ethernet PHY and Controllers
  • Present Cadence’s IP portfolio and capabilities to prospective customers
  • Serve as a product expert in digital controller and PHY IPs and protocols
  • Work closely with IP Sales staff, marketing and R&D teams to win opportunities
  • Demonstrate IP Performance at industry events and to prospective customers
  • Provide quick‑turn product specific technical support to customers, field teams, architects and designers
  • Write application notes and articles for internal and/or external publication
  • Travel to customer sites may be required occasionally
Qualifications
  • BS in EE, CE or related equivalent with 15+ years of relevant work experience or MS in EE, CE or equivalent with 10+ years of relevant work experience
  • Knowledge of one or more high speed interface protocols – PCIe, CXL, UCIe, Ethernet, USB, MIPI, 224G, 112G
  • Strong knowledge of PHY and/or controllers for one or more high speed interface protocols
  • Individual leadership and initiative to manage pre‑sales accounts
  • Excellent presentation skills and verbal/written communication skills – a must
Nice to Have
  • Lab validation and demo setup skills
  • Experience on high‑speed interface controller and/or PHY verification
  • Knowledge of AXI and PIPE interface protocols
  • Working knowledge of high‑speed interface PHY

The annual salary range for California is $123,200 to $228,800. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

High Speed Interface Protocols, Principal AE
High Speed Interface Protocols, Principal AE

Cadence Design Systems • San Jose (CA)

On-site
USD 123,000 - 229,000
401(k) plan with employer match
Employee stock purchase plan
Paid vacation and holidays
+1
High Speed PHY FW Engineer
High Speed PHY FW Engineer

Cadence • San Jose (CA)

On-site
USD 101,000 - 189,000
Sr. Product Marketing Manager
Sr. Product Marketing Manager

Cadence Design Systems, Inc. • San Jose (CA)

On-site
USD 154,000 - 286,000
Paid vacation and holidays
401(k) plan with employer match
Employee stock purchase plan
+1
SerDes IP Systems Engineering Director
SerDes IP Systems Engineering Director

Cadence • San Jose (CA)

On-site
USD 178,000 - 332,000
Paid vacation
401(k) plan with employer match
Employee stock purchase plan
Sr Principal Design Engineer
Sr Principal Design Engineer

Cadence • San Jose (CA)

On-site
USD 154,000 - 286,000
Paid vacation
401(k) plan with employer match
Employee stock purchase plan
+1
Principal Analog IC Design Engineer, High Speed SerDes
Principal Analog IC Design Engineer, High Speed SerDes

Cadence • San Jose (CA)

On-site
USD 137,000 - 254,000
Sr Principal Application Engineer
Sr Principal Application Engineer

Cadence • San Jose (CA)

On-site
USD 143,000 - 267,000
401(k) plan with employer match
Employee stock purchase plan
Medical, dental, and vision plans
+1
Principal Analog IC Design Engineer, High Speed SerDes
Principal Analog IC Design Engineer, High Speed SerDes

Cadence Design Systems • San Jose (CA)

On-site
USD 136,500 - 253,500
Paid vacation and holidays
401(k) plan with employer match
Employee stock purchase plan
Principal High-Speed Interface Architect (PCIe/CXL/Ethernet)
Principal High-Speed Interface Architect (PCIe/CXL/Ethernet)

Cadence • San Jose (CA)

On-site
USD 123,000 - 229,000
Principal Design Engineer
Principal Design Engineer

Cadence • Cary (NC)

On-site
USD 136,000 - 254,000
401(k) plan with employer match
Employee stock purchase plan
Medical, dental, and vision plans