HBM SOC Design Engineer: High-Performance Architecture

micron; Richardson (TX); On-site; USD 140,000 - 170,000; Full time

Job summary

Micron Technology in Richardson, Texas is seeking an experienced HBM SOC Design Engineer to drive next‑generation memory solutions. You will architect, verify, and integrate high‑speed interfaces and IP blocks within 2.5D/3D packaging, collaborating across design teams to achieve best‑in‑class performance.

The role emphasizes SystemVerilog RTL development, microarchitecture insight, CDC and timing analysis, and power-aware design, with responsibilities from spec writing to pre/post‑silicon

Qualifications

• 3+ years of relevant job/skill-related experience.
• Proficiency in microarchitecture and RTL development with the ability to write and test code in System Verilog.
• Experience dealing with clock domain crossings (CDC), static timing analysis, synthesis design constraints, and closing timing by using logic techniques, false path constraints, and multi-cycle path constraints.
• Experience with SOC interconnects and bus standards like AMBA AXI, ACE, APB, AHB, etc.
• Understanding of design for testability concepts such as MBIST and scan and how to write RTL for testability.

Responsibilities

• Analyze customer requirements and specification documents, work with IP vendors to select off-the-shelf IPs, and modify or custom design new ones if needed.
• Review architectural specifications and provide constructive feedback to help create high-quality specifications.
• Writing specifications, developing RTL, integrating IP, testing code, debugging failures, running static checks and resolving issues identified by static checks
• Proactively identify and flag quality issues, performance problems, and opportunities to reduce power consumption in architecture, microarchitecture, RTL, or circuits.
• Debug and identify root causes and solutions for pre-silicon and post-silicon issues encountered in current HBM products and architectures.

Skills

SystemVerilog

RTL development

CDC / timing analysis

AMBA AXI / ACE / APB / AHB

MBIST / scan

Education

BSEE or higher

Tools

Python

Job description

Micron Technology in Richardson, Texas is seeking an experienced HBM SOC Design Engineer to drive next‑generation memory solutions. You will architect, verify, and integrate high‑speed interfaces and IP blocks within 2.5D/3D packaging, collaborating across design teams to achieve best‑in‑class performance.

The role emphasizes SystemVerilog RTL development, microarchitecture insight, CDC and timing analysis, and power-aware design, with responsibilities from spec writing to pre/post‑silicon