HBM SoC Design Architect — New Grad

Micron Technology, Inc.; Folsom (CA); Hybrid; USD 79,000 - 175,000; Full time

Job summary

Micron Technology, Inc. in Folsom, CA is seeking a New College Grad to contribute to the design, integration, and validation of HBM logic die and memory-centric SoCs.

You will collaborate with engineers across RTL, architecture, verification and product engineering to tackle power, performance and timing challenges. Ideal candidates will have coursework or internships in digital design, ASIC/FPGA development and memory interfaces, with a strong foundation in Verilog/SystemVerilog.

Qualifications

• Bachelor's degree in Electrical Engineering or Computer Engineering.
• Experience in digital design, ASIC/FPGA development.
• Working knowledge of Verilog or SystemVerilog.
• Understanding FSMs, pipelining, timing, and synchronous logic.
• Strong analytical and communication skills.

Responsibilities

• Design, implement, and integrate RTL using Verilog/SystemVerilog for next-gen HBM SoC solutions.
• Collaborate with architects and cross-functional teams to translate requirements into microarchitectures.
• Support design-quality activities including simulation, synthesis, STA, CDC analysis, debugging, and design reviews.
• Evaluate power, performance, area, and timing tradeoffs to improve design quality.
• Develop automation solutions and leverage AI-assisted workflows to improve productivity.

Skills

Verilog

SystemVerilog

VHDL

Digital design

ASIC development

FPGA design

Computer architecture

Communication

Education

Bachelor's degree in Electrical Engineering or Computer Engineering

Tools

UVM

FPGA prototyping

EDA tools

Job description

Micron Technology, Inc. in Folsom, CA is seeking a New College Grad to contribute to the design, integration, and validation of HBM logic die and memory-centric SoCs.

You will collaborate with engineers across RTL, architecture, verification and product engineering to tackle power, performance and timing challenges. Ideal candidates will have coursework or internships in digital design, ASIC/FPGA development and memory interfaces, with a strong foundation in Verilog/SystemVerilog.