HBM SoC Design Architect — AI-Driven ASIC for Memory

Micron Technology; Folsom (CA); On-site; USD 126,000 - 210,000; Full time

Job summary

Micron Technology is seeking an HBM SoC Design Engineer/Architect in the United States to contribute to the design, integration, and validation of advanced HBM logic die and memory-centric SoCs. You will collaborate with cross-functional teams to solve ASIC design challenges and advance AI-enabled engineering methodologies.

Your work will involve digital design, RTL, Verilog/SystemVerilog, and consideration of power, performance, and area tradeoffs, with opportunities to apply AI-assisted

Qualifications

• Bachelor's degree in Electrical or Computer Engineering or related field.
• Experience in digital design, ASIC/SoC development, or FPGA design.
• Working knowledge of Verilog/SystemVerilog or VHDL; timing and FSM basics.
• Master's or Ph.D. in Electrical/Computer Engineering preferred.
• Familiarity with high-speed interfaces such as HBM, DDR, PCIe preferred.
• Experience with AI-enabled tooling or Generative AI in engineering workflows preferred.

Responsibilities

• Design, implement, and integrate digital RTL for next-generation HBM SoC solutions.
• Collaborate with architects and cross-functional teams to translate requirements into microarchitectures.
• Support design-quality activities including simulation, synthesis, STA, clock-domain checks, and reviews.
• Evaluate tradeoffs in power, performance, area to improve design quality.
• Develop automation and leverage AI-assisted workflows to improve productivity.

Skills

Verilog/SystemVerilog

Digital design fundamentals

ASIC/SoC design

cross-functional collaboration

Education

Bachelor's degree in Electrical or Computer Engineering

Master's or Ph.D. in related field preferred

Tools

EDA tools

Synthesis/STA/Simulation

Job description

Micron Technology is seeking an HBM SoC Design Engineer/Architect in the United States to contribute to the design, integration, and validation of advanced HBM logic die and memory-centric SoCs. You will collaborate with cross-functional teams to solve ASIC design challenges and advance AI-enabled engineering methodologies.

Your work will involve digital design, RTL, Verilog/SystemVerilog, and consideration of power, performance, and area tradeoffs, with opportunities to apply AI-assisted