HBM Design Validation Engineer – Next-Gen Memory

Micron Memory Malaysia Sdn Bhd

Richardson (TX)

On-site

USD 120,000 - 180,000

Full time

14 days+

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Job summary

Micron Technology in Richardson, TX is seeking an Engineer to join the HIG HBM PSE - Design Validation team. You will validate HBM designs from silicon bring-up through qualification and into production, interfacing with design, manufacturing, test, and quality.

The role emphasizes understanding JEDEC specs, scripting in Python or C/C++, Verilog, and collaborating in a multicultural team to deliver low power per bit solutions for ML/AI workloads.

Qualifications

  • Bachelor's degree or MS or equivalent experience in Electrical or Computer Engineering.
  • Experience with Schematic, Simulation, Data Analysis, Lab Debug, or Pattern Manipulation.
  • Strong time management and efficient work habits.
  • Excellent problem-solving and analytical skills; good teamwork.

Responsibilities

  • Understand JEDEC specifications for HBM and related architectures.
  • Craft internal architecture documentation and schematic/layout knowledge.
  • Perform silicon validation and hardware/software debugging in lab and simulations.
  • Collaborate with PE and cross-functional teams to drive validation.
  • Contribute to continual improvement of validation methodologies and workflows.

Skills

Teamwork
Problem-solving
Analytical skills
Time management
Communication

Education

Bachelor's degree in Electrical or Computer Engineering
MS in Electrical or Computer Engineering

Tools

Verilog
VHDL
SystemVerilog
Python
C/C++
Schematic

Job description

Micron Technology in Richardson, TX is seeking an Engineer to join the HIG HBM PSE - Design Validation team. You will validate HBM designs from silicon bring-up through qualification and into production, interfacing with design, manufacturing, test, and quality.

The role emphasizes understanding JEDEC specs, scripting in Python or C/C++, Verilog, and collaborating in a multicultural team to deliver low power per bit solutions for ML/AI workloads.

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