Hardware Verification Engineer

Mogi I/O : OTT/Podcast/Short Video Apps for you

Belton (TX)

On-site

USD 160,000 - 180,000

Full time

14 days+

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Job summary

A leading tech company in Texas is seeking a Verification Engineer to lead RTL design verification for high-speed digital systems. This role involves developing verification plans, building SV/UVM environments, and ensuring full functional coverage while collaborating with cross-functional teams. Candidates should have over 5 years of experience in digital engineering with at least 3 years in design verification, and possess strong debugging skills. Competitive compensation of $160,000 - $180,000 is offered.

Qualifications

  • Over 5 years of experience in digital/RTL engineering required.
  • At least 3 years in design verification is mandatory.
  • Strong knowledge of VLSI verification flows essential.

Responsibilities

  • Lead RTL design verification for high-speed digital systems.
  • Develop and execute verification plans based on design specs.
  • Build and maintain SV/UVM environments.

Skills

Digital/RTL engineering
Design verification
VLSI verification flows
SystemVerilog & UVM
Debugging skills

Job description

Location: USA - Texas Austin

Employment Type: Permanent

Experience Required: 5 - 10 Years (Minimum 3 years in Design Verification)

Compensation: USD 160000 - 180000

Position Overview

The Verification Engineer will lead RTL design verification for high-speed digital systems. This role focuses on building verification environments, executing test strategies, and ensuring full functional coverage while collaborating with design and architecture teams.

Key Responsibilities
  • Develop and execute verification plans based on design specs
  • Build and maintain SV/UVM environments
  • Define and close functional and code coverage
  • Debug RTL and support regression testing
  • Participate in reviews, test planning, and sign-off
  • Document results and collaborate cross-functionally
Must-Have Skills
  • 5+ years in digital/RTL engineering
  • 3+ years in design verification
  • Strong knowledge of VLSI verification flows
  • Hands-on with SystemVerilog & UVM (or equivalent)
  • Strong debugging and problem-solving skills
Nice to Have
  • Protocol/datapath verification experience (Ethernet preferred)
  • Mixed-signal exposure
  • Strong documentation and communication skills
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