Hardware Security Architect for Physical AI SoC

Velaura AI, Inc.; Santa Clara (CA); Hybrid; USD 200,000 - 300,000; Full time

Benefits offered by this job

Equity compensation

Medical/dental/vision benefits

Paid time off

Flexible work arrangements

Job summary

Velaura AI, Inc. seeks a Security Architect to own the end-to-end security architecture for our Physical AI System-on-Chip. You will define hardware-root-of-trust, secure boot, key management, and lifecycle provisioning across the silicon roadmap.

You will lead threat modeling, align with RTL/silicon design, firmware, and software teams, and drive security requirements from architecture through production. This role demands leadership, deep crypto knowledge, and safety-conscious design.

Qualifications

• 10+ years in security engineering or architecture, with significant experience defining hardware/SoC security for shipping silicon or embedded platforms.
• Deep expertise in hardware security primitives: root of trust, secure boot, TEEs, key management, secure debug, and crypto implementations.
• Strong command of applied cryptography and of physical and side-channel attack classes and their countermeasures.
• Hands-on experience with SoC development flows and RTL/silicon interfaces; ability to specify and review security-relevant hardware/firmware.
• Proven ability to lead threat modeling and drive security requirements across multidisciplinary teams.
• Master’s degree in Electrical/Computer Engineering, CS, or related field, or equivalent practical experience.
• Excellent written and verbal communication skills with track record of influencing technical direction and mentoring engineers.

Responsibilities

• Own the SoC security architecture: define hardware root of trust, secure boot, key management, secure debug, and lifecycle provisioning strategy across Velaura’s Physical AI silicon roadmap.
• Architect protection for AI workloads and sensitive assets on-chip, including confidential/integrity protections, secure AI/NPU execution, memory isolation, TEEs, and cryptographic acceleration.
• Lead threat modeling and security risk assessments for the SoC and subsystems; translate attacker capabilities into hardware/firmware requirements.
• Partner with silicon design, firmware, safety, and platform software to embed security requirements into RTL, boot flow, and SDK; review implementations against architecture.
• Define secure updates, attestation, and device identity approaches to keep fielded systems trustworthy.
• Establish security architecture standards and review processes; mentor engineers and raise security bar across the organization.
• Guide alignment with security and functional-safety standards and support certification, audit, and customer security assurance efforts.

Skills

Hardware security architecture

Threat modeling

Root of trust & secure boot

Key management & cryptography

RTL/SoC development collaboration

Security engineering leadership

Communication & mentoring

Education

Master's degree in Electrical/Computer Engineering or related

PhD in Electrical/Computer Engineering, CS, or related (preferred)

Tools

TEEs (TrustZone or equivalent)

Hardware security primitives

Job description

Velaura AI, Inc. seeks a Security Architect to own the end-to-end security architecture for our Physical AI System-on-Chip. You will define hardware-root-of-trust, secure boot, key management, and lifecycle provisioning across the silicon roadmap.

You will lead threat modeling, align with RTL/silicon design, firmware, and software teams, and drive security requirements from architecture through production. This role demands leadership, deep crypto knowledge, and safety-conscious design.