Hardware FPGA Design Engineer

Cisco; Maynard (MA); On-site; USD 146,000 - 206,000; Full time

Job summary

Cisco is seeking a Hardware FPGA Design Engineer to join their innovative team responsible for developing cutting-edge communication products. The role requires strong expertise in FPGA design and verification, alongside collaborative problem-solving skills. Join Cisco to drive the future of technology in a vibrant, inclusive environment where innovation thrives.

Qualifications

• Minimum 5+ years of FPGA design and verification experience.
• Hands-on experience with Python and Linux.
• Experience designing interfaces with various digital devices.

Responsibilities

• Design and verify FPGAs for Acacia's product platform.
• Write Python routines for test development and automation.
• Contribute to FPGA emulation of ASIC blocks.

Skills

FPGA design

Verilog RTL coding

Python

Linux

High speed SERDES

Education

Bachelor's +8 years or Master's +6 years or PhD +3 years in related field

Tools

Xilinx design tool chain

Job description

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This range is provided by Cisco. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

Base pay range

$146,000.00/yr - $205,400.00/yr

The application window is expected to close on: 7/31/2025

Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.

Meet the Team

Acacia, now part of Cisco, designs intelligent optical transceivers using sophisticated signal processing and photonic integration for >1T bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks. The team is a versatile and upbeat team of enthusiastic engineers in an environment where team members experience mutual enhancement and improvement. You will have the opportunity to collaborate cross-functionally with our Hardware, Software, Optics, and manufacturing teams.

Your Impact

You are a high-energy FGPA Design engineer who loves to work on complex communications products. You are a team player with a startup mentality who loves to challenge the status quo with creation and innovation. You can figure things out by yourself, but you are comfortable to participate in our friendly and team-oriented collaboration approach to learn from others. You are not shy to point out how we can be more effective as a team, and yet you are open to similar suggestions by your team members to foster mutual growth for all.

• Design/Verify FGPAs For Acacia's Product and Evaluation platform
• Write Python routines for Test Development and Automation
• Contribute to FPGA Emulation of ASIC Blocks
• Contribute to our custom ASIC RTL code
  
  

Minimum Qualifications (Provide up to five (5) bullet points - these should be clearly defined, objective, non-comparative, relevant, and quantifiable to appropriately evaluate applicants – not including soft skills):

• Bachelors +8 years of experience, or Masters +6 years of experience, or PHD +3 years of experience of related experience or higher with minimum
• 5+ years of FPGA design and verification experience
• Experience in Verilog RTL coding and synthesis for FPGAs
• Experience with Python and Linux
• Experience designing interfaces with Processors, SPI & I2C devices, MDIO, high speed SERDES, etc.
• Experience in Xilinx design tool chain for design, place, and route (ISE, Vivado suite)
  
  

Preferred Qualifications (Provide up to five (5) bullet points: these can include soft skills)

• C/C++ and experience coding with embedded MCUs
• Experience in designs and timing closure with multiple clock domains
• Experience work in labs and experience with test equipment to help with board level and FPGA bring up
• Experience with analog components (OpAmps, DACs/ADCs, etc.)
• Experience implementing digital control loops and DSP functions
• Experience with Xilinx FPGA families such as Ultrascale+
• Experience with Synopsys VCS simulation and Synplify synthesis tools for FPGAs
• Expertise in creating FPGA implementations from ASIC RTL code
• Expertise in digital design of standard cell ASICs
• Experience presenting technical information to technical and non-technical audiences.
  
  

Why Cisco

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Simply put – we power the future.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

Seniority level

• Seniority level

  Not Applicable

Employment type

• Employment type

  Full-time

Job function

• Industries

  Computer Hardware Manufacturing, Software Development, and Computer Networking Products

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