Hardware Developer – New Grad (FPGA, C/C++, Verilog)

Quantiq; Chicago (IL); On-site; USD 90,000 - 120,000; Full time

Job summary

Quantiq, a precision-focused trading technology firm, seeks a Hardware Developer-New Graduate for its Chicago office to advance production trading environments. You will own projects spanning network stack, FPGA NICs, PCIe crossings and kernel socket engineering, delivering thoughtful insights with regular updates.

Requirements include 1+ year hardware development, Verilog/SystemVerilog/VHDL and C/C++, plus familiarity with Xilinx Vivado, FPGAs and TCP/IP.

Qualifications

• 1+ years experience in a hardware development environment.
• Degree in electrical/computer engineering, physics or related field preferred.
• Proficient in Verilog/SystemVerilog/VHDL and familiar with C/C++.
• Knowledgeable about Xilinx Vivado, FPGAs and IPs.
• Familiar with TCP/IP and UDP networking.
• Strong communication and collaborative skills.

Responsibilities

• Maintain and enhance existing hardware and low-level software infrastructure.
• Collaborate with Operations and Technical teams to meet business needs.
• Evaluate performance of existing systems and streamline operations.
• Write high-performing code (Verilog/VHDL and C/C++).
• Monitor and communicate project releases across the organization.
• Deep dive analysis and debugging of new and existing code.
• Conduct testing on large datasets.
• Other duties as assigned.

Skills

Communication skills

Curiosity

Problem solving

Education

Bachelor's degree in EE/CE/Physics or related

Tools

Verilog

SystemVerilog

VHDL

C/C++

Xilinx Vivado

FPGAs

TCP/IP & UDP

Linux (SSH)

Job description

Quantiq, a precision-focused trading technology firm, seeks a Hardware Developer-New Graduate for its Chicago office to advance production trading environments. You will own projects spanning network stack, FPGA NICs, PCIe crossings and kernel socket engineering, delivering thoughtful insights with regular updates.

Requirements include 1+ year hardware development, Verilog/SystemVerilog/VHDL and C/C++, plus familiarity with Xilinx Vivado, FPGAs and TCP/IP.