Hardware Developer

Quantiq

Chicago (IL)

On-site

USD 130,000 - 190,000

Full time

14 days+

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Job summary

Quantiq is seeking a Hardware Developer to design, optimize, and maintain our high‑performance network paths and FPGA data processing platform. You will work with a team to push digital logic design, IP optimization, and software interfacing drivers toward maximum latency‑sensitive performance.

You should bring 5+ years in hardware development, strong Verilog/SystemVerilog/VHDL and C/C++ abilities, and experience with Xilinx Vivado, FPGAs, and IP.

Qualifications

  • 5+ years in Hardware Development or equivalent experience in low-latency environments.
  • Familiar with network protocols and hardware build scripting.
  • Proficient with Xilinx Vivado, FPGAs and IP cores.
  • Advanced Verilog, SystemVerilog or VHDL and C/C++ skills.

Responsibilities

  • Architect and develop low-latency modules and platforms in Verilog/VHDL with multiple clock domains.
  • Design custom network protocol drivers in C++, focusing on performance and memory optimization.
  • Document architecture decisions and optimization strategies for knowledge sharing.
  • Debug and profile new and legacy code to maintain peak performance.
  • Evaluate system performance and refine technical operations.
  • Write high-quality, efficient code (Verilog/VHDL and C/C++).

Skills

Communication skills
Collaboration
Problem solving
Adaptability

Tools

Xilinx Vivado
FPGAs
Verilog/SystemVerilog/VHDL
C/C++

Job description

Quantiq specializes in high frequency derivatives trading in the largest markets worldwide. Our approach is rigorous and pragmatic, driven by technological expertise and analytics, informed by real‑world experience. We value employees who love to learn and have the tenacity, curiosity, and willpower to contribute to our continuing success.

We are a small but passionate team, dedicated to enhancing and refining our tried and true methods as we commit to our ongoing growth and performance.

Role Description

As a Hardware Developer, you’ll be responsible for designing, optimizing, and maintaining our critical network paths and infrastructure. Working alongside a skilled team of developers, you’ll contribute to our custom FPGA data processing platform, focusing on low‑latency digital logic design, IP optimization, and software interfacing drivers. This role demands expert knowledge of digital circuits, tools, and computer architecture, and a relentless drive to push systems to their maximum performance potential. If the following resonates with you, we would love to welcome you to our team.

Job Responsibilities
  • Architect and develop low‑latency modules and platforms in Verilog/VHDL, with precise management of multiple clock domains and data streams
  • Design custom network protocol drivers in C++, with focus on performance, concurrency, and memory optimization
  • Document code intricacies, architecture decisions, and optimization strategies to foster knowledge sharing across teams
  • Conduct in‑depth debugging and profiling of new and legacy code, implementing fixes that maintain or enhance performance
  • Evaluate system performance and refine technical operations
  • Write quality, highly performant code (Verilog/VHDL and C/C++)
Qualifications
  • 5+ years in Hardware Development, preferably in low‑latency or performance‑sensitive environments
  • Familiarity with network protocols, hardware build scripting
  • Experience with Xilinx Vivado, FPGAs, and IP
  • Advanced proficiency in Verilog, SystemVerilog, and/or VHDL, and C/C++
  • Excellent communication skills within a collaborative environment
  • Demonstrated ability to respond promptly and accurately in a fast‑paced, dynamic environment
  • Strong skills in solving complex mathematical and engineering challenges
Please Apply If
  • You are enthusiastic about the latest developments in circuits and FPGA boards
  • You have hands‑on experience with high‑performance infrastructure
  • You’re comfortable navigating large codebases
  • You enjoy performance tuning and digging into low‑level system details
  • You think of ways to solve complex engineering challenges even when you’re off the clock

Please note: The use of AI tools during applications, assessments, and interviews is strictly prohibited. Quantiq utilizes various methods to determine candidate authenticity. Use of these tools at any time may result in the disqualification of your candidacy.

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