Low-Latency FPGA Hardware Engineer

Zapier Inc.

Chicago (IL)

On-site

USD 120,000 - 180,000

Full time

9 hours ago
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Job summary

Quantiq is seeking a Hardware Developer to design, optimize, and maintain our FPGA-based data processing platform. You will work with a team of developers on low-latency digital logic, IP optimization, and software interfacing drivers to push performance to new limits.

The role emphasizes Verilog/VHDL expertise, C/C++ driver development, and deep knowledge of networking protocols and FPGA toolchains. Collaboration and rapid problem-solving are essential in this fast-paced environment.

Qualifications

  • 5+ years in Hardware Development, preferably in low-latency or performance-sensitive environments.
  • Familiarity with network protocols, hardware build scripting, and debug tools using Xilinx Vivado, FPGAs, and IP
  • Advanced proficiency in Verilog, SystemVerilog, and/or VHDL, and C/C++
  • Excellent communication skills within a collaborative environment
  • Demonstrated ability to respond promptly and accurately in a fast-paced, dynamic environment
  • Strong skills in solving complex mathematical and engineering challenges

Responsibilities

  • Architect and develop low-latency modules and platforms in Verilog/VHDL, with precise management of multiple clock domains and data streams
  • Design custom network protocol drivers in C++, with focus on performance, concurrency, and memory optimization
  • Document code intricacies, architecture decisions, and optimization strategies to foster knowledge sharing across teams
  • Conduct in-depth debugging and profiling of new and legacy code, implementing fixes that maintain or enhance performance
  • Evaluate system performance and refine technical operations
  • Write quality, highly performant code (Verilog/VHDL and C/C++)

Skills

Verilog
SystemVerilog
VHDL
C/C++
FPGA
Networking protocols
Xilinx Vivado
Debug tools
Performance optimization
Communication

Tools

Xilinx Vivado

Job description

Quantiq is seeking a Hardware Developer to design, optimize, and maintain our FPGA-based data processing platform. You will work with a team of developers on low-latency digital logic, IP optimization, and software interfacing drivers to push performance to new limits.

The role emphasizes Verilog/VHDL expertise, C/C++ driver development, and deep knowledge of networking protocols and FPGA toolchains. Collaboration and rapid problem-solving are essential in this fast-paced environment.

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