FPGA

Objective Partners; Chicago (IL); Hybrid; USD 130,000 - 180,000; Full time

Job summary

Objective Partners is seeking an experienced FPGA Engineer to join a high-performance hardware team in Chicago. You will own end-to-end silicon design and verification, delivering low-latency, scalable IP cores for data processing platforms.

You'll shape architectural decisions, integrate high-speed transceivers, and collaborate with software teams using C++ and scripting to streamline the development lifecycle. A strong background in HDL design and FPGA toolchains is required.

Qualifications

• Proven full FPGA/ASIC lifecycle experience.
• Expertise in SystemVerilog/Verilog/VHDL.
• Proficiency with FPGA synthesis and simulation toolchains.
• Strong C/C++ programming and build process understanding.
• Scripting in Python, TCL or Bash.

Responsibilities

• Architect and implement FPGA/ASIC designs.
• Develop modular IP components scalable across platforms.
• Lead verification for production reliability.
• Integrate high-speed transceivers and optimize networks.
• Collaborate on software-hardware interfaces using C++ and scripting.
• Maintain and improve build systems and workflows.

Skills

HDL design

FPGA toolchains

C/C++ programming

Python scripting

TCL scripting

Bash scripting

Education

Bachelor's degree or higher

Tools

CMake

Job description

FPGA Engineer

Location: Chicago, IL

About the Opportunity

We are seeking a seasoned FPGA Engineer to join a high-performance engineering team focused on building scalable, low-latency hardware solutions. This is an opportunity to take ownership of end-to-end silicon design and verification, developing sophisticated IP cores that power complex, high-speed data processing platforms. You will play a critical role in architectural decisions and the evolution of our hardware-accelerated infrastructure.

Responsibilities

• Architect and implement sophisticated FPGA/ASIC designs using hardware description languages.

• Develop modular, reusable IP components designed to scale across diverse hardware platforms.

• Lead the verification process to ensure high-reliability performance in production environments.

• Integrate high-speed transceivers and optimize network protocol stacks for efficient packet handling.

• Collaborate on software-hardware interfaces, utilizing C++ and scripting to streamline the development lifecycle.

• Maintain and improve build systems and automated workflows for hardware deployment.

Requirements

• Substantial professional experience in the full FPGA/ASIC development lifecycle.

• Expertise in SystemVerilog, Verilog, or VHDL.

• Advanced proficiency with industry-standard FPGA synthesis and simulation toolchains.

• Strong programming background in C or C++, with an understanding of software compilation processes.

• Competency in scripting for automation using Python, TCL, or Bash.

• Bachelor’s degree or higher in Electrical Engineering, Computer Science, or a related technical field.

Preferred Qualifications

• Hands-on experience with high-speed serial links and transceivers.

• Deep understanding of Ethernet networking protocols and real-time packet processing.

• Familiarity with CMake for managing complex build environments.

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