Hardware Design Engineer – AI Router Boards

Cisco; San Jose (CA); On-site; USD 138,000 - 197,000; Full time

Job summary

Cisco is seeking a Hardware Engineer to design high-performance boards for our next-generation networking hardware, spanning high-density switches to large-scale routers.

You will own the full lifecycle of board design, from schematic capture to layout verification, including debugging high-speed signals and power delivery networks. Collaboration across teams will drive robust, scalable solutions for AI infrastructure.

Qualifications

• Bachelor's degree in electrical or computer engineering with 5+ years of related experience or Master’s with 3+ years.
• Experience overseeing schematic capture and PCB layout for high-complexity systems.
• Experience debugging hardware with high-speed test equipment (oscilloscopes, VNAs, logic analyzers).
• Familiarity with industry-standard design suites like Concept, Allegro, LTspice.

Responsibilities

• Develop high-performance board designs for Cisco's next-generation networking hardware.
• Own full lifecycle of board design, debugging, and schematic/layout verification.
• Design and sustain complex, high-speed multi-layer PCBs with high-speed links and power delivery networks.
• Perform root-cause analysis on hardware failures including signal integrity and power issues.
• Develop and execute test plans and document procedures for engineering use.
• Lead design reviews of schematics, BOMs, layout, and routing using internal tools.
• Conduct FA, RCA, and CAR to improve long-term product reliability.

Skills

Schematic capture

PCB layout

Hardware debugging

High-speed testing

Python scripting

Education

Bachelor's degree in electrical or computer engineering

Master's degree in electrical or computer engineering

Tools

Concept

Allegro

LTspice

Job description

Cisco is seeking a Hardware Engineer to design high-performance boards for our next-generation networking hardware, spanning high-density switches to large-scale routers.

You will own the full lifecycle of board design, from schematic capture to layout verification, including debugging high-speed signals and power delivery networks. Collaboration across teams will drive robust, scalable solutions for AI infrastructure.