Hardware Design Engineer

Experis (Austria); Carlsbad (CA); Remote; USD 140,000 - 190,000; Full time

Job summary

ManpowerGroup is seeking a DFT Lead / Hardware Design Engineer to join the silicon life cycle team. You will implement DFT features (scan, MBIST, BISR, boundary scan) and drive RTL integration with testability across the design flow, coordinating with cross‑functional teams.

The role requires 8–10 years in Electrical/Computer Engineering, hands-on DFT experience, ATPG proficiency, and expertise with Tessent, Xcelium, Genus, Tempus/Primetime. US remote options available.

Qualifications

• BS or MS in Electrical or Computer Engineering
• 8–10 years of relevant experience
• Experience with JTAG, scan and BIST architectures
• Hands-on post-silicon DFT debug and release to production
• Experience integrating 3rd‑party IPs and high‑speed macros
• ATPG and EDA tools Tessent, Xcelium, Genus, Tempus/Primetime

Responsibilities

• Implement DFT features: scan, MBIST, BISR, boundary scan and DFT simulations
• Develop DFT IP with RTL integration and testability features
• Create reusable test and debug strategies for silicon models and die configurations
• Lead post-silicon debugging and root-cause analysis for testability failures
• Coordinate DFT execution across pre- to post-silicon phases with cross-functional teams

Skills

JTAG protocols

scan architectures

MBIST

boundary scan

ATPG

post-silicon debug

Education

Electrical or Computer Engineering, BS

Electrical or Computer Engineering, MS

Tools

Tessent

Xcelium

Genus

Tempus/Primetime

Job description

Our client is seeking a Hardware Design Engineer to join their team. As a Hardware Design Engineer, you will be part of the Silicon life cycle engineering group supporting DFT (Design for Test) technical leadership. The ideal candidate will have strong hands‑on ASIC DFT experience, the ability to craft solutions and debug with minimal mentorship, and excellent communication skills that help align cross‑functional teams.

Job Title

DFT (Design for Test) Lead / Hardware Design Engineer

Location

Carlsbad, CA or Allentown, PA (US Remote possible)

What’s the Job?

• Implement Hardware DFT features including scan, MBIST, BISR, and boundary scan, and set up/debug DFT simulations
• Develop innovative DFT IP in collaboration with multi‑functional teams and support full chip design integration with testability features coordinated in RTL
• Contribute to reusable test and debug strategies for new silicon device models, bare die, and stacked die, including innovative DFT and physical design aspects
• Support post‑silicon testing, debug, and release to production by driving root cause analysis of silicon failures tied to testability and patterns
• Lead DFT technical execution from pre‑silicon design through post‑silicon debt and production qualification, coordinating across the silicon life cycle

What’s Needed?

• Bachelor’s or Master’s Degree in Electrical or Computer Engineering required, with at least 8‑10 years of experience
• Experience with JTAG protocols, scan and BIST architectures (including memory BIST and boundary scan), and integrating 3rd‑party IPs and high‑speed digital/analog macros
• Experience with ATPG and EDA tools such as Tessent tool sets, Xcelium, Genus, and Tempus/Primetime
• At least one project with hands‑on post‑silicon debug of DFT patterns (scan, MBIST, boundary scan) and release to production
• Ability to craft solutions and debug with minimal mentorship, demonstrating strong attention to detail and system‑level understanding

What’s in it for me?

• Opportunity to lead DFT technical execution for silicon powering next‑generation network devices in AI infrastructure
• Work across the full product cycle from pre‑silicon design to post‑silicon debug and production qualification
• Collaborate with multi‑functional teams to develop reusable test and debug strategies for advanced packaging and die configurations
• Contribute to high‑quality, testable, and manufacturable designs through ATPG, scan compression, memory BIST, and memory repair

About ManpowerGroup, Parent Company of: Manpower, Experis, Talent Solutions, and Jefferson Wells

ManpowerGroup® (NYSE: MAN), the leading global workforce solutions company, helps organizations transform in a fast‑changing world of work by sourcing, assessing, developing, and managing the talent that enables them to win. We develop innovative solutions for hundreds of thousands of organizations every year, providing them with skilled talent while finding meaningful, sustainable employment for millions of people across a wide range of industries and skills. Our expert family of brands – Manpower, Experis, Talent Solutions, and Jefferson Wells – creates substantial value for candidates and clients across more than 75 countries and territories and has done so for over 70 years. We are recognized consistently for our diversity - as a best place to work for Women, Inclusion, Equality and Disability and in 2023 ManpowerGroup was named one of the World’s Most Ethical Companies for the 14th year - all confirming our position as the brand of choice for in‑demand talent.

Upon Completion Of Waiting Period Consultants Are Eligible For

• Medical and Prescription Drug Plans
• Dental Plan
• Vision Plan
• Health Savings Account
• Health Flexible Spending Account
• Dependent Care Flexible Spending Account
• Supplemental Life Insurance
• Short Term and Long Term Disability Insurance
• Business Travel Insurance
• 401(k), Plus Match
• Weekly Pay