Hardware Applications Engineer

Xsight Labs; San Jose (CA); On-site; USD 160,000 - 210,000; Full time

Job summary

Xsight Labs in San Jose, CA is seeking a Hardware Applications Engineer to enable customers to design around our X2 switch and E1 DPU silicon. You will work with customer hardware teams on schematic reviews, PCB layout reviews, and high-speed signal integrity analysis to bring data center networking and DPU platforms to market.

The role involves collaborating with internal engineering teams, defining detailed hardware test plans, creating design-in documentation, and providing post-sales

Qualifications

• B.S. in Electrical Engineering or related discipline.
• 8+ years of hands-on PCB design, schematic capture, and layout review for high-speed digital systems.
• Experience with PCIe and Ethernet SerDes at 25G/50G/100G+ PAM4.
• Strong SI/PI knowledge and ability to translate into layout improvements.
• Fluency in English (written and verbal).

Responsibilities

• Conduct schematic reviews of customer boards integrating X2 switch or E1 DPU silicon.
• Review PCB layouts focusing on high-speed SerDes routing and impedance control.
• Support PDN design and power integrity reviews for high-density silicon.
• Define hardware test plans and POC plans for customer evaluations.
• Collaborate with silicon, package, and firmware teams to resolve issues.
• Provide post-sales technical support and cross-functional communication.

Skills

PCB design

Schematic capture

Layout review

SerDes

Power integrity

SI/PI analysis

English fluency

Communication skills

Travel readiness

Education

B.S. in Electrical Engineering

Tools

BERT

VNA

TDR

Oscilloscope

Job description

This position will report to the Director of Customer Engineering within the Commercial team. As a Hardware Applications Engineer, you will play a hands‑on role in enabling Xsight customers to successfully design hardware around our X2 switch and E1 DPU silicon.

You’ll work directly with customer hardware teams on schematic reviews, PCB layout reviews, and high-speed signal integrity analysis — helping bring new data center networking and DPU platforms to market.

This is a dynamic role, where day‑to‑day activities are shaped by the diversity of customer board designs and the breadth of Xsight’s silicon portfolio. Responsibilities will include, but are not limited to:

• • Conduct schematic reviews of customer boards integrating X2 switch or E1 DPU silicon, validating power delivery, reset/boot sequencing, and interface connections against Xsight design guidelines.
• • Conduct PCB layout reviews focused on high-speed SerDes routing (up to 224G PAM4), differential pair matching, impedance control, and breakout strategy for high pin‑count BGA packages.
• • Support power integrity and power delivery network (PDN) design reviews for high‑density silicon operating within tight power and thermal envelopes.
• • Define detailed hardware test plans and proof‑of‑concept plans in support of customer evaluations.
• • Collaborate with internal engineering teams (silicon, package, SI/PI, firmware) to resolve customer design issues.
• • Communicate cross‑functionally with Marketing, Sales, and R&D.
• • Create and maintain hardware design‑in documentation and reference design collateral.
• • Conduct technical training sessions and workshops on hardware design‑in practices.
• • Provide ongoing post‑sales technical support.

Minimum Qualifications

• :• Candidates must have valid, unrestricted authorization to work in the U.S. Sponsorship is not available for this position
• .• B.S. in Electrical Engineering or related discipline
• .• 8+ years of hands‑on experience in PCB design, schematic capture, and layout review for high‑speed digital systems
• .• Hands‑on experience with high‑speed serial technologies (PCIe, Ethernet SerDes) at 25G/50G/100G+ PAM4 rates
• .• Deep understanding of signal integrity and power integrity simulation reports, and the ability to translate that into recommendations for layout improvements
• .• Familiarity with high‑speed connector and cabling standards (OSFP, QSFP‑DD, QSFP, SFP‑DD, DAC)
• .• Working knowledge of high pin‑count BGA/FCLBGA package design considerations, PDN design, and thermal management for high‑power ASICs
• .• Customer service‑oriented mindset and strong communication skills, including fluency in English (written and verbal)
• .• Excellent problem‑solving skills
• .• Ability to work independently and as part of a team
• .• Energized by a dynamic and demanding start‑up environment
• .• Ability to support occasional travel. Things that would differentiate you from other candidates

Things that would differentiate you from other candidates

• :• Experience designing hardware around switch ASICs (e.g., Broadcom Tomahawk, Trident, Jericho, NVIDIA/Mellanox Spectrum, Marvell Teralynx, Prestera) or DPU/IPU/smartNIC silicon
• .• Experience with PCIe Gen5 compliance testing and retimer/redriver architectures
• .• Hands‑on lab experience with BERT, VNA, TDR, and high‑speed oscilloscope measurement for channel characterization
• .• Experience with reference design bring‑up for switch systems or PCIe add‑in card platforms
• .• Familiarity with DFM/DFT practices and working with contract manufacturers
• .• Comfortable managing multiple projects and resolving technical issues under tight timelines
• :• Locations: Boston, MA Raleigh, NC San Jose, C

A