Senior Hardware Applications Engineer — High‑Speed PCB & SI/PI

Xsight Labs

San Jose (CA)

On-site

USD 160,000 - 210,000

Full time

17 hours ago
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Job summary

Xsight Labs in San Jose, CA is seeking a Hardware Applications Engineer to enable customers to design around our X2 switch and E1 DPU silicon. You will work with customer hardware teams on schematic reviews, PCB layout reviews, and high-speed signal integrity analysis to bring data center networking and DPU platforms to market.

The role involves collaborating with internal engineering teams, defining detailed hardware test plans, creating design-in documentation, and providing post-sales

Qualifications

  • B.S. in Electrical Engineering or related discipline.
  • 8+ years of hands-on PCB design, schematic capture, and layout review for high-speed digital systems.
  • Experience with PCIe and Ethernet SerDes at 25G/50G/100G+ PAM4.
  • Strong SI/PI knowledge and ability to translate into layout improvements.
  • Fluency in English (written and verbal).

Responsibilities

  • Conduct schematic reviews of customer boards integrating X2 switch or E1 DPU silicon.
  • Review PCB layouts focusing on high-speed SerDes routing and impedance control.
  • Support PDN design and power integrity reviews for high-density silicon.
  • Define hardware test plans and POC plans for customer evaluations.
  • Collaborate with silicon, package, and firmware teams to resolve issues.
  • Provide post-sales technical support and cross-functional communication.

Skills

PCB design
Schematic capture
Layout review
SerDes
Power integrity
SI/PI analysis
English fluency
Communication skills
Travel readiness

Education

B.S. in Electrical Engineering

Tools

BERT
VNA
TDR
Oscilloscope

Job description

Xsight Labs in San Jose, CA is seeking a Hardware Applications Engineer to enable customers to design around our X2 switch and E1 DPU silicon. You will work with customer hardware teams on schematic reviews, PCB layout reviews, and high-speed signal integrity analysis to bring data center networking and DPU platforms to market.

The role involves collaborating with internal engineering teams, defining detailed hardware test plans, creating design-in documentation, and providing post-sales

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