Hands-on Semiconductor Packaging Process Intern

Anite; Santa Rosa (CA); On-site; USD 59,000 - 77,000; Full time

Job summary

Keysight is seeking a Semiconductor Advanced Packaging Process Engineering Intern in California to contribute to the development and optimization of next‑generation heterogeneous integration and advanced packaging technologies.

You will collaborate with process and manufacturing engineers to support development, characterization, and continuous improvement of assembly processes for SiP and interposer technologies.

Qualifications

• Graduate student pursuing an MS or PhD in a technical field.
• Experience in semiconductor processing, materials characterization, microfabrication, or related areas.
• Strong analytical, problem-solving, and data interpretation skills.
• Excellent written and verbal communication and teamwork abilities.
• Hands-on laboratory, manufacturing, research, or engineering project experience.
• Curiosity and proactive feedback-seeking attitude.

Responsibilities

• Assist planning, execution, and documentation of experiments evaluating processes, materials, and equipment.
• Collect and analyze process, metrology, and electrical data to identify trends.
• Work with advanced semiconductor assembly equipment (TCB, pick-and-place, inspection).
• Support development to improve cycle time, throughput, yield, and robustness.
• Conduct hands-on equipment experiments and document results for improvements.
• Assist in failure analysis and defect characterization of assembly issues.
• Develop and maintain technical docs: plans, procedures, reports, presentations.
• Present findings to engineering teams and stakeholders.
• Follow safety, quality, and cleanroom procedures in semiconductor environments.

Skills

Analytical skills

Problem-solving

Data interpretation

Communication skills

Team collaboration

Multitasking

Hands-on lab experience

Curiosity/learning mindset

Education

MS or PhD in Electrical/Mechanical/Chemical Engineering or related field

Tools

MATLAB

Python

JMP

Job description

Keysight is seeking a Semiconductor Advanced Packaging Process Engineering Intern in California to contribute to the development and optimization of next‑generation heterogeneous integration and advanced packaging technologies.

You will collaborate with process and manufacturing engineers to support development, characterization, and continuous improvement of assembly processes for SiP and interposer technologies.