Semiconductor Advanced Packaging Process Engineering Intern

Anite; Santa Rosa (CA); On-site; USD 59,000 - 77,000; Full time

Job summary

Keysight is seeking a Semiconductor Advanced Packaging Process Engineering Intern in California to contribute to the development and optimization of next‑generation heterogeneous integration and advanced packaging technologies.

You will collaborate with process and manufacturing engineers to support development, characterization, and continuous improvement of assembly processes for SiP and interposer technologies.

Qualifications

• Graduate student pursuing an MS or PhD in a technical field.
• Experience in semiconductor processing, materials characterization, microfabrication, or related areas.
• Strong analytical, problem-solving, and data interpretation skills.
• Excellent written and verbal communication and teamwork abilities.
• Hands-on laboratory, manufacturing, research, or engineering project experience.
• Curiosity and proactive feedback-seeking attitude.

Responsibilities

• Assist planning, execution, and documentation of experiments evaluating processes, materials, and equipment.
• Collect and analyze process, metrology, and electrical data to identify trends.
• Work with advanced semiconductor assembly equipment (TCB, pick-and-place, inspection).
• Support development to improve cycle time, throughput, yield, and robustness.
• Conduct hands-on equipment experiments and document results for improvements.
• Assist in failure analysis and defect characterization of assembly issues.
• Develop and maintain technical docs: plans, procedures, reports, presentations.
• Present findings to engineering teams and stakeholders.
• Follow safety, quality, and cleanroom procedures in semiconductor environments.

Skills

Analytical skills

Problem-solving

Data interpretation

Communication skills

Team collaboration

Multitasking

Hands-on lab experience

Curiosity/learning mindset

Education

MS or PhD in Electrical/Mechanical/Chemical Engineering or related field

Tools

MATLAB

Python

JMP

Job description

Overview

Keysight is at the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~16,800 employees create world‑class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do.

Our award‑winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry‑first solutions.We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers.
This internship is a minimum of 3 months but can be extended up to a year depending on the project and candidates availability

Responsibilities

As a Semiconductor Advanced Packaging Process Engineering Intern within the Keysight Labs/High Frequency Technology Center, you will contribute to the development and optimization of next‑generation heterogeneous integration and advanced packaging technologies. Working alongside process and manufacturing engineers, you will support the development, characterization, and continuous improvement of semiconductor assembly processes used to manufacture advanced System-in-Package (SiP) products and interposer technologies.

Key Responsibilities include:

• Assist with the planning, execution, and documentation of engineering experiments to evaluate process, material, and equipment performance.


• Collect, analyze, and interpret process, metrology, and electrical test data to identify trends and improvement opportunities.


• Work directly with advanced semiconductor assembly equipment, including thermocompression bonding (TCB), pick‑and‑place, inspection, and supporting process tools.


• Support process development activities focused on improving assembly cycle time, throughput, yield, and process robustness.


• Execute hands‑on equipment experiments, collect process data, and partner with engineers to identify and implement process improvements.


• Assist in failure analysis, defect characterization, and troubleshooting of assembly‑related process issues.


• Develop and maintain technical documentation, including experiment plans, procedures, reports, and presentations.


• Present technical findings and recommendations to engineering teams and project stakeholders.


• Follow established safety, quality, and cleanroom operating procedures while working in a semiconductor manufacturing environment.

This internship is highly hands‑on and provides extensive opportunities to work directly with manufacturing equipment, engineering experiments, process characterization, and data analysis in a fast‑paced R&D environment. Successful candidates are naturally curious, eager to learn, comfortable working in a laboratory or manufacturing setting, and willing to ask questions to accelerate their understanding and impact.

Qualifications

Required Qualifications

• Graduate student pursuing an M.S. or Ph.D. in Electrical Engineering, Mechanical Engineering, Chemical Engineering, Materials Science, Chemistry, Physics, Manufacturing Engineering, or a related technical field.


• Academic or research experience in semiconductor processing, materials characterization, microfabrication, device fabrication, advanced packaging, manufacturing engineering, or related areas.
  Understanding of semiconductor manufacturing processes, materials, and device fundamentals.


• Strong analytical, problem‑solving, and data interpretation skills.
  Excellent written and verbal communication skills and the ability to work effectively in a collaborative team environment.


• Self‑motivated with a demonstrated ability to manage multiple tasks and meet project objectives in a fast‑paced R&D environment.


• Demonstrated hands‑on laboratory, manufacturing, research, or engineering project experience.


• Strong curiosity, willingness to learn, and a proactive approach to asking questions and seeking feedback.

Preferred Qualifications

• Hands‑on laboratory or research experience with semiconductor fabrication processes such as lithography, deposition, etch, electroplating, CMP, metrology, defect inspection, advanced packaging, or semiconductor assembly technologies.


• Experience with statistical analysis, design of experiments (DOE), process characterization, or data analysis tools such as JMP, MATLAB, Python, or equivalent.


• Experience with manufacturing equipment, automation, robotics, precision motion systems, or machine vision systems.


• Experience presenting technical results through reports, publications, conference presentations, or research reviews.


• Experience working in cleanroom, laboratory, or manufacturing environments.


• Exposure to advanced packaging, flip‑chip assembly, thermocompression bonding, or electronic packaging technologies is highly desirable.

Candidates who wish to be considered must be enrolled in an accredited college/university as of September 2027. Applicants who have graduated before September 2027 will not be considered unless they are entering/applying to a MS or PHD program after graduating.

This position requires access to certain goods, software, technology, or technical data subject to U.S. export control laws and regulations. Under these laws and regulations, U.S. persons (which includes U.S. citizens, U.S. nationals, lawful permanent residents, refugees, and asylees) working for Keysight can access export‑controlled items without authorization from the U.S. government. For any individual who is not a U.S. person, Keysight may need authorization from the U.S. Department of State, U.S. Department of Commerce, or other appropriate federal agency before the individual can access export‑controlled items. Candidates must be a U.S. citizen or lawful permanent resident of the U.S., or protected individual, having authorization from the U.S. government for export‑controlled items under 8 U.S.C. 1324b(a)(3).

(Masters) CA Pay Range- $43.27-$46.60

(PhD) CA Pay Range- $52.89-$56.96

Based on experience, education and skills, most offers will be between the minimum and the midpoint of the Salary Range listed above.
Note: For other locations, pay ranges will vary by region.

Visa Sponsorship is not available for this position. Candidates who now or at any point in the future require sponsorship for employment visa status (e.g., H-1B Visa status) may not be considered.

Careers Privacy Statement***Keysight is an Equal Opportunity Employer.***