FPGA Verification Engineer — UVM, SoC & Flight‑Critical

HIKINEX; Costa Mesa (CA); On-site; USD 100,000 - 130,000; Full time

Job summary

HIKINEX is seeking a FPGA Verification Engineer in Costa Mesa, CA. Responsibilities include architecting UVM verification environments, developing verification plans, and ensuring compliance with safety standards like DO-254. Candidates should have a Bachelor's in Electrical Engineering or related field and 2+ years in FPGA/ASIC verification. Proficiencies in SystemVerilog, UVM, and industry simulators like Questa are essential. A collaborative approach and eligibility for U.S. Secret security clearance are also required.

Qualifications

• 2+ years of experience in FPGA/ASIC verification.
• Proficient in UVM methodology and SVA.
• Eligible to obtain a U.S. Secret security clearance.

Responsibilities

• Architect and implement UVM verification environments.
• Develop verification plans with traceability.
• Author SystemVerilog Assertions for compliance checks.
• Establish and maintain regression suites.
• Collaborate with design engineers on RTL reviews.

Skills

SystemVerilog

UVM methodology

Object-oriented programming

Git-based workflows

Linux development

Communication skills

Teamwork

Education

Bachelor's degree in Electrical Engineering or related field

Tools

Questa

VCS

Xcelium

Vivado

Job description

HIKINEX is seeking a FPGA Verification Engineer in Costa Mesa, CA. Responsibilities include architecting UVM verification environments, developing verification plans, and ensuring compliance with safety standards like DO-254. Candidates should have a Bachelor's in Electrical Engineering or related field and 2+ years in FPGA/ASIC verification. Proficiencies in SystemVerilog, UVM, and industry simulators like Questa are essential. A collaborative approach and eligibility for U.S. Secret security clearance are also required.