FPGA Hardware Engineer Intern - High-Speed, Low-Latency

Akuna Capital; Illinois; On-site; USD 131,000 - 160,000; Full time

Job summary

Akuna Capital seeks Hardware Engineer Interns for a 10-week Akunacademy summer internship, joining our FPGA Team to design high-performance, low-latency systems. You will own your project and present results at program end, collaborating with hardware and C++ software engineers.

We value diverse backgrounds and provide training to develop both technical and non-technical skills; AI tools are discussed for day-to-day work but not used in interviews.

Qualifications

• Pursuing a bachelor’s, master’s, or Ph.D. in Computer and Electrical Engineering, Computer Science, or a related field.
• Graduating by August 2029.
• GPA of 3.5 or above.
• Legal authorization to work in the U.S. on the first day of employment including F-1 students using CPT, OPT or STEM.

Responsibilities

• Join FPGA team to design and implement elegant solutions for high-performance, low-latency systems.
• Take ownership of your project and present accomplishments at the program end.
• Collaborate with hardware and C++ software engineers to push speed and performance.
• Gain training and continuous education to develop both technical and non-technical skills.

Skills

Verilog

SystemVerilog

VHDL

Digital logic design

Analytical skills

Problem solving

C++ programming

Education

Bachelor's/Master's/PhD in Computer and Electrical Engineering or CS

Graduating by August 2029

GPA 3.5+

Job description

Akuna Capital seeks Hardware Engineer Interns for a 10-week Akunacademy summer internship, joining our FPGA Team to design high-performance, low-latency systems. You will own your project and present results at program end, collaborating with hardware and C++ software engineers.

We value diverse backgrounds and provide training to develop both technical and non-technical skills; AI tools are discussed for day-to-day work but not used in interviews.