FPGA Hardware Engineer Intern — High-Impact, Low-Latency

Akuna Capital Llc; Chicago, Northern (IL, KY); Hybrid; USD 131,000 - 160,000; Full time

Job summary

Akuna Capital LLC in Chicago invites talented Hardware Engineer Interns to join the FPGA team for a 10-week internship. You will work with senior hardware and C++ software engineers to design high-performance, low-latency solutions and own your project from concept to presentation.

Requirements include pursuing a bachelor’s/master’s/Ph.D. in CS/EE, graduating by Aug 2029, GPA 3.5+, legal work authorization, and an openness to learning. We value diverse backgrounds; training is provided.

Qualifications

• Pursuing a bachelor’s, master’s, or Ph.D. in Computer and Electrical Engineering, Computer Science, or a related field.
• Graduating by August 2029.
• GPA of 3.5 or above.
• Legal authorization to work in the U.S. on the first day of employment including F-1 students using CPT, OPT or STEM.

Responsibilities

• Join our FPGA Team and work alongside experienced Hardware and C++ Software Engineers to design and implement elegant solutions.
• Take full ownership of your project and present your work at the end of the program.
• Work on high-performance, low-latency systems and automated trading algorithms.

Skills

Strong analytical skills

Problem solving

Fast adaptation

Passion for innovation

Education

Bachelor’s/Master’s/Ph.D. in Computer and Electrical Engineering, Computer Science, or related field

Tools

Verilog

SystemVerilog

VHDL

Job description

Akuna Capital LLC in Chicago invites talented Hardware Engineer Interns to join the FPGA team for a 10-week internship. You will work with senior hardware and C++ software engineers to design high-performance, low-latency solutions and own your project from concept to presentation.

Requirements include pursuing a bachelor’s/master’s/Ph.D. in CS/EE, graduating by Aug 2029, GPA 3.5+, legal work authorization, and an openness to learning. We value diverse backgrounds; training is provided.