FPGA Hardware Engineer Intern: Ultra-Low Latency Trading

Virtu Financial; Austin (TX); Sur place; USD 66 960 - 111 600; Plein temps

Avantages offerts par ce poste

Onsite Gym & workout classes

Onsite Barista

Weekly happy hours/social events

Breakfast & Lunch

Transportation

Résumé du poste

Virtu Financial invites applicants for a 10-week FPGA Internship in Austin. Interns will tackle real hardware/software challenges in ultra-low latency trading environments, guided by senior mentors and project lists.

The program emphasizes hands-on design across RTL, simulation, verification and silicon bring-up, with ongoing training and onsite perks. Strong interest in hardware and learning ability are key.

Qualifications

• Must be pursuing a Masters in Electrical Engineering or related field.
• Experience with hardware description languages (SystemVerilog, Verilog).
• Comfortable with software languages (Python, C++, or similar).
• Basic understanding of network protocols.
• Strong problem solving and communication skills.

Responsabilités

• Work on FPGA/ASIC-related projects through the internship.
• Receive mentoring from senior engineers and work on real design problems.
• Contribute across the hardware/software boundary from architecture to bring-up on live hardware.

Connaissances

SystemVerilog/Verilog

Python

C++

Networking basics

Problem solving

Communication

Formation

Masters in Electrical Engineering or related field

Description du poste

Virtu Financial invites applicants for a 10-week FPGA Internship in Austin. Interns will tackle real hardware/software challenges in ultra-low latency trading environments, guided by senior mentors and project lists.

The program emphasizes hands-on design across RTL, simulation, verification and silicon bring-up, with ongoing training and onsite perks. Strong interest in hardware and learning ability are key.