FPGA Design Engineer I - Secret Clearance Eligible

ngc

Chandler (AZ)

On-site

USD 87,000 - 131,000

Full time

4 days ago
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Benefits offered by this job

Relocation assistance

Job summary

Northrop Grumman Space Systems in Chandler, AZ seeks an FPGA Digital Engineer to support the EO Group. You will collaborate with hardware, algorithms, and software teams to design, verify, and integrate FPGAs for advanced systems. Early-career role emphasizes learning under guidance.

You will work with senior engineers on test benches, HDL modules, and documentation while growing expertise in industry-standard tools and methodologies. Eligible for DoD clearance.

Qualifications

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or related discipline with 2 years of experience, or a Master’s degree.
  • DoD Secret clearance eligibility at time of application.
  • Experience with FPGAs/SoCs (AMD Xilinx) and HDL tools.
  • Knowledge of design constraints (timing, power, I/O) and Vivado.

Responsibilities

  • Assist senior FPGA engineers and cross-disciplinary teams on design and integration challenges.
  • Develop and execute test benches to verify FPGA designs for functional and timing requirements.
  • Support IO and image processing HDL module development and integration with device architecture.
  • Prepare design documentation including schematics, simulation results, and verification reports.
  • Support FPGA bitstream build configuration management.
  • Contribute to compliance with internal design standards throughout the lifecycle.
  • Keep expanding knowledge of FPGA technologies, tools, and industry methodologies.

Skills

FPGA design & verification
HDL (VHDL/Verilog)
Test benches
OSVVM/UVM verification
Embedded C/C++ (coursework)

Education

Bachelor's degree in Electrical/Computer Engineering
Master's degree

Tools

Vivado IDE
Questa/ModelSim
Oscilloscopes/Logic analyzers
Ethernet/PCIe/AXI4 interfaces

Job description

Northrop Grumman Space Systems in Chandler, AZ seeks an FPGA Digital Engineer to support the EO Group. You will collaborate with hardware, algorithms, and software teams to design, verify, and integrate FPGAs for advanced systems. Early-career role emphasizes learning under guidance.

You will work with senior engineers on test benches, HDL modules, and documentation while growing expertise in industry-standard tools and methodologies. Eligible for DoD clearance.

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