FPGA Digital Engineer (Entry-Level) with Secret Clearance

Northrop Grumman; Chandler (AZ); On-site; USD 87,000 - 131,000; Full time

Benefits offered by this job

Health insurance

Life and disability insurance

Savings plan

Paid holidays

Paid time off

Job summary

Northrop Grumman Space Systems seeks an FPGA Digital Engineer to support the EO Group in Chandler, AZ. This early-career role emphasizes learning and contributing to the design, verification, and integration of FPGAs for advanced systems, collaborating with hardware, algorithms, and software teams.

You will assist senior engineers, develop test benches, document designs, and help manage FPGA bitstreams while adhering to internal standards.

Qualifications

• Bachelor’s degree in Electrical or Computer Engineering; 2+ years of related experience, or Master’s degree.
• Experience with FPGAs/SoCs, VHDL/Verilog; Vivado or similar tools.
• Familiarity with designing, verifying, and debugging digital hardware and interfaces.

Responsibilities

• Assist senior FPGA engineers and cross-disciplinary teams on design and integration tasks.
• Develop and execute test benches to verify FPGA designs against requirements.
• Support IO and image processing HDL modules, including HDL coding and simulation.

Skills

FPGAs experience

HDL development

Verilog/VHDL

Digital design

Education

Bachelor’s degree in Electrical/Computer Engineering

Master’s degree preferred

Tools

Vivado IDE

Questa/ModelSim

Oscilloscopes

Logic analyzers

Job description

Northrop Grumman Space Systems seeks an FPGA Digital Engineer to support the EO Group in Chandler, AZ. This early-career role emphasizes learning and contributing to the design, verification, and integration of FPGAs for advanced systems, collaborating with hardware, algorithms, and software teams.

You will assist senior engineers, develop test benches, document designs, and help manage FPGA bitstreams while adhering to internal standards.