FPGA Design Engineer - Avionics & Autonomy Systems

Slope; Costa Mesa (CA); On-site; USD 146,000 - 194,000; Full time

Job summary

Anduril Industries in Costa Mesa, CA is seeking an FPGA Design Engineer to design and integrate RTL for FPGA and SoC platforms used in high-performance embedded systems and avionics. You will work across the full development cycle from requirements through RTL implementation, timing closure, lab bring-up, and system integration.

Candidates should have 2+ years in FPGA/ASIC digital design, proficiency in VHDL/Verilog, and hands-on experience with simulation, synthesis, and timing closure.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
• 2+ years of FPGA, ASIC, or closely related digital design experience.
• Proficiency in VHDL and/or Verilog/SystemVerilog.
• Hands-on experience with simulation, synthesis, implementation, and timing closure on modern FPGA platforms.
• Hands-on debug experience in simulation and on hardware.
• Strong digital design fundamentals, including clocking, resets, state machines, CDC awareness, and interface design.
• Proficiency with Linux-based development environments, Git-based workflows, and Tcl and/or Python scripting.
• Strong written and verbal communication skills.
• Eligible to obtain and maintain an active U.S. Secret security clearance.

Responsibilities

• Design and implement RTL in VHDL, Verilog, or SystemVerilog for FPGA and SoC-based systems.
• Translate system and hardware requirements into microarchitecture, interface definitions, and implementation plans.
• Own FPGA designs or major functional blocks from architecture through integration, timing closure, and lab debug.
• Develop and execute simulation, synthesis, and implementation flows, including timing and resource closure.
• Debug functional, timing, and integration issues in simulation and on hardware.
• Support board bring-up, lab validation, and system integration on target platforms.
• Collaborate with hardware, embedded software, systems, and verification engineers to deliver complete solutions.
• Participate in design reviews, code reviews, and technical documentation.
• Contribute to reusable design practices, coding standards, and development workflows.
• Support rapid prototyping while maintaining the engineering rigor required for production hardware.

Skills

FPGA design

VHDL

Verilog/SystemVerilog

RTL

timing closure

simulation

lab debug

Linux

Git

Tcl/Python scripting

communication

security clearance

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, or related field

Tools

Xilinx

Intel/Altera

Lattice FPGA environments

Vitis or similar tooling

Job description

Anduril Industries in Costa Mesa, CA is seeking an FPGA Design Engineer to design and integrate RTL for FPGA and SoC platforms used in high-performance embedded systems and avionics. You will work across the full development cycle from requirements through RTL implementation, timing closure, lab bring-up, and system integration.

Candidates should have 2+ years in FPGA/ASIC digital design, proficiency in VHDL/Verilog, and hands-on experience with simulation, synthesis, and timing closure.