FPGA Design Engineer, Avionics & Air-Dominance

Frontdoor Defense; Costa Mesa (CA); Hybrid; USD 146,000 - 194,000; Full time

Benefits offered by this job

Equity grants

Top-tier benefits

Job summary

Anduril Industries in Costa Mesa, CA is seeking an FPGA Design Engineer to lead RTL development for high-performance avionics platforms. You will drive architecture, timing closure, and lab bring-up across FPGA/SoC environments in mission-critical hardware.

The role requires FPGA/ASIC design experience, strong VHDL/Verilog skills, and the ability to work across hardware, software, and verification teams. A U.S. Secret clearance is required and top-tier benefits apply.

Qualifications

• Bachelor’s degree in Electrical/Computer Engineering or related field.
• 2+ years FPGA/ASIC/digital design experience.
• Proficiency in VHDL and/or Verilog/SystemVerilog.
• Hands-on experience with simulation, synthesis, timing closure.
• Linux, Git, Tcl and/or Python scripting experience.
• Ability to obtain/maintain a U.S. Secret security clearance.
• Strong written and verbal communication skills.

Responsibilities

• Design and implement RTL in VHDL/Verilog/SystemVerilog for FPGA/SoC.
• Translate requirements into microarchitecture and interfaces.
• Own designs from architecture to timing closure and lab debug.
• Develop and execute simulation, synthesis, and implementation flows.
• Debug functional, timing, and integration issues on hardware.
• Support board bring-up, lab validation, and system integration.
• Collaborate with hardware, software, systems, and verification teams.
• Participate in design/code reviews and documentation.
• Contribute to reusable IP and development workflows.
• Support rapid prototyping while ensuring production discipline.

Skills

FPGA design

Verilog/SystemVerilog

VHDL

ASIC/digital design

Lab debugging

Python scripting

Git workflows

Communication

Security clearance

Education

Bachelors in Electrical Engineering

Tools

Vivado

Vitis

Quartus

Lattice tools

ModelSim

Git

Tcl scripting

Python scripting

Job description

Anduril Industries in Costa Mesa, CA is seeking an FPGA Design Engineer to lead RTL development for high-performance avionics platforms. You will drive architecture, timing closure, and lab bring-up across FPGA/SoC environments in mission-critical hardware.

The role requires FPGA/ASIC design experience, strong VHDL/Verilog skills, and the ability to work across hardware, software, and verification teams. A U.S. Secret clearance is required and top-tier benefits apply.