Foundry Product Engineer: Yield & Diagnostics Lead

Samsung Electronics America; Austin (TX); Vor Ort; USD 131.000 - 175.000; Vollzeit

Benefits dieser Stelle

Medical, dental, and vision insurance

401(k) matching with immediate vesting

Onsite facilities and wellness

Zusammenfassung

Samsung Austin Semiconductor is seeking a visionary engineer to architect defect analysis workflows and yield learning models, driving robustness across advanced process technologies. You will oversee engineering margins and optimize wafer sort evaluations, shaping the transition of new products from fab to market.

You will leverage SCAN/SRAM diagnostics and ATE knowledge to isolate root causes, collaborate with teams, and advance technology test vehicles while delivering measurable improvements

Qualifikationen

• Bachelor's or Master's in Engineering or equivalent.
• Strong foundation in semiconductor physics and circuit fundamentals.
• Understanding of ATE fundamentals and test methodologies (Wafer Sort, DFT, EFA, Characterization, Shmoo).
• Statistical analysis and data literacy (Statistics, STDF/Parametric data analysis, CPK, JMP/Spotfire or similar).
• Structured debug and root-cause troubleshooting mindset (build yield learning model, differentiate test vs. process margin or defect).
• Cross-functional communication and technical ownership with data-driven feedback.

Aufgaben

• Lead edge product and technology development based on Samsung’s process.
• Learn the most advanced technology in the semiconductor industry and develop yield/chip performance.
• Collaborate with internal teams to launch new products for customers.
• Leverage wafer sort data, WAT data, fabrication process, design rules, and product ATE knowledge to rapidly isolate root causes.

Kenntnisse

Semiconductor physics

Data analysis

Root-cause troubleshooting

Engineering fundamentals

Cross-functional collaboration

Statistical methods

CPK

Ausbildung

Bachelor's or Master's in Engineering

Tools

JMP

Spotfire

Jobbeschreibung

Samsung Austin Semiconductor is seeking a visionary engineer to architect defect analysis workflows and yield learning models, driving robustness across advanced process technologies. You will oversee engineering margins and optimize wafer sort evaluations, shaping the transition of new products from fab to market.

You will leverage SCAN/SRAM diagnostics and ATE knowledge to isolate root causes, collaborate with teams, and advance technology test vehicles while delivering measurable improvements