Firmware Engineer II - DDR5 PHY & Bring-Up

Cadence Design Systems, Inc.; Austin (TX); On-site; USD 90,000 - 130,000; Full time

Job summary

Cadence Design Systems, Inc. in Austin is seeking an engineer to join the DDR PHY IP Front End Design team. You will develop firmware for DDR5 PHY using microcontrollers and work with hardware and memory subsystem architects on training algorithms.

The role focuses on bare-metal C firmware development, RTL-based simulations, and silicon bring-up board testing. Collaboration with verification teams is essential to ensure firmware-hardware co-verification.

Qualifications

• DDR5 JEDEC specs knowledge and DIMM configurations.
• Experience in bare-metal firmware for high-speed SerDes or memory interface PHY blocks.
• Proficiency in C for embedded software and IDE usage.
• Experience debugging RTL simulations involving firmware and MCU subsystems.
• Proficiency in Shell/Perl/Python/TCL scripting.
• Experience with Verification EDA tools like simulators and waveform viewers.

Responsibilities

• Develop firmware for DDR5 PHY using microcontrollers.
• Develop firmware in C with bare-metal programming and low-level APIs.
• Collaborate with hardware designers and memory architects on training algorithms.
• Collaborate with verification team on firmware-hardware co-verification.
• Develop and debug firmware in RTL-based hardware simulations.
• Develop and debug on silicon bring-up boards.

Skills

DDR5 JEDEC specs

Bare-metal firmware development

C programming for embedded software

Scripting: Shell/Perl/Python/TCL

RTL/firmware co-verification

Tools

IDE

Verification EDA tools

RTL simulation debugging

Job description

Cadence Design Systems, Inc. in Austin is seeking an engineer to join the DDR PHY IP Front End Design team. You will develop firmware for DDR5 PHY using microcontrollers and work with hardware and memory subsystem architects on training algorithms.

The role focuses on bare-metal C firmware development, RTL-based simulations, and silicon bring-up board testing. Collaboration with verification teams is essential to ensure firmware-hardware co-verification.