Firmware Engineer II

Cadence Design Systems; Austin (TX); On-site; USD 110,000 - 140,000; Full time

Job summary

Cadence Design Systems is seeking an embedded firmware engineer to develop DDR5 PHY firmware using microcontrollers and bare-metal code. You will work with hardware designers and memory subsystem architects to implement training algorithms and co-verify with the verification team.

Responsibilities include RTL-level debugging and silicon bring-up. The role requires strong C programming, experience with DDR5 specifications, and scripting proficiency for automation.

Qualifications

• Experience developing bare-metal firmware for High-speed SerDes or memory interface PHY blocks.
• Strong C programming for embedded software development with IDEs.
• Comfortable debugging RTL simulations involving firmware and microcontroller subsystems.

Responsibilities

• Develop firmware for DDR5 PHY using microcontrollers and bare-metal programming.
• Collaborate with hardware designers and memory subsystem architects to derive training algorithms and implement them.
• Collaborate with the verification team to plan firmware-hardware co-verification.
• Develop and debug firmware in RTL-based hardware simulations (C + Verilog).
• Develop and debug on silicon bring-up boards.

Skills

DDR5 knowledge

Bare-metal firmware

C programming

RTL debugging

Scripting languages

EDA tool experience

Tools

Verilog simulators

Waveform viewers

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Description

Be part of the Cadence DDR PHY IP Front End Design team responsible for

• Develop firmware for DDR5 PHY using microcontrollers
• Developing firmware in C typically involving bare-metal programming and developing low-level APIs on Microcontrollers.
• Responsible for collaborating with hardware designers and memory subsystem architects to derive training algorithms and implement them.
• Responsible for collaborating with the verification team to deduce firmware-hardware co-verification plan.
• Develop and Debug firmware in RTL based hardware simulations (C +Verilog simulations)
• Develop and Debug on Silicon bring-up boards.

Required Skills:

• Good Knowledge of DDR5 JEDEC spec, knowledge of different DIMM configurations and specifications.
• Relevant experience in developing bare-metal firmware for High-speed SerDes or Memory interface Physical Layer blocks.
• Good Knowledge of C programming language for embedded software development and use of relevant IDE.
• Comfortable debugging RTL simulations involving firmware and microcontroller subsystem.
• Good knowledge of Shell/Perl/Python/TCL scripting
• Good experience on Verification EDA Tools like simulators and waveform viewers

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Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For.

Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.