Energy-Efficient Silicon Engineering Intern

Efficient Computer; Austin, Pittsburgh, San Francisco (TX, Allegheny County, CA); On-site; USD 34,000 - 44,000; Full time

Benefits offered by this job

401K match

Company-paid benefits

Equity program

Paid parental leave

Flexibility

Job summary

Efficient Computer is building a new energy-efficient processor architecture. As a Silicon Engineering Intern, you will own a well-scoped project, collaborate with a dedicated mentor, and present results to the team at internship end.

You will contribute to micro-architecture definitions, RTL implementation, verification planning, and tool-assisted flows on production silicon, not sandbox tasks.

Qualifications

• Pursuing BS/MS/PhD in Electrical or Computer Engineering with graduation Summer 2028.
• At least one term of school remaining after Summer 2027.
• Coursework or project experience in digital logic design, verification, VLSI/physical design, or EDA tooling.
• Experience with at least one programming or scripting language (Python, C/C++, Tcl or Perl).

Responsibilities

• Define micro-architecture for blocks and features and implement RTL in SystemVerilog.
• Turn specs into verification plans; build testbench components and write tests.
• Run synthesis, place-and-route and timing analysis; evaluate power, performance and area trade-offs.
• Build and improve design, verification and implementation flows, including automation.
• Collaborate with arch, design and verification engineers to fix issues before tapeout.

Skills

Digital logic design

Verification

VLSI/physical design

EDA tooling

Python

C/C++

Tcl

Perl

Education

BS, MS or PhD in Electrical Engineering or Computer Engineering

Tools

Verilog/SystemVerilog

Synthesis tools

Static timing analysis

Place-and-route tools

Job description

Efficient Computer is building a new energy-efficient processor architecture. As a Silicon Engineering Intern, you will own a well-scoped project, collaborate with a dedicated mentor, and present results to the team at internship end.

You will contribute to micro-architecture definitions, RTL implementation, verification planning, and tool-assisted flows on production silicon, not sandbox tasks.