Emulation Verification Engineer

Broadcom; San Jose (CA); On-site; USD 69,000 - 110,000; Full time

Job summary

Broadcom's Core Switch Group is hiring for a pre-silicon verification role focused on ASIC emulation and validation. You will work with Verilog/SystemVerilog, C/C++, Tcl, and Python to verify switch chips in emulation environments and develop test benches.

You'll join a world-class team delivering high-performance networking ASICs, collaborating across Architecture, DV, Design, and Software to ensure robust verification coverage and timely project execution. Entry-level applicants encouraged.

Qualifications

• Bachelor's degree required with 0-2 years in pre-silicon verification, emulation, or ASIC simulation.
• Eagerness to learn and contribute to verification infrastructure.
• Foundational knowledge in Verilog/SystemVerilog, C/C++, Tcl, Python, and scripting for automation.
• Exposure to emulation platforms (Zebu, Palladium) and high-speed interfaces (PCIe, Ethernet).
• Developing debugging skills and collaboration with cross-functional teams.

Responsibilities

• Assist in pre-silicon studies to define and execute test plans.
• Verify design and micro-architecture using emulation platforms.
• Develop tests in Tcl, ITcl, Python, and C/C++ for switch chips.
• Contribute to building Verilog/SystemVerilog models for emulation.
• Debug hardware and software issues across blocks and chips.
• Write automation scripts to improve efficiency and coverage.
• Collaborate with Architecture, DV, Design, and Software teams.

Skills

Verilog/SystemVerilog exposure

C/C++ exposure

Python scripting

Teamwork / communication

Education

Bachelor's degree in related field

Tools

Zebu

Palladium

IXIA

Spirent

PCIe

Ethernet

Job description

Broadcom's Core Switch Group is hiring for a pre-silicon verification role focused on ASIC emulation and validation. You will work with Verilog/SystemVerilog, C/C++, Tcl, and Python to verify switch chips in emulation environments and develop test benches.

You'll join a world-class team delivering high-performance networking ASICs, collaborating across Architecture, DV, Design, and Software to ensure robust verification coverage and timely project execution. Entry-level applicants encouraged.