Emulation Solutions Architect

Synopsys Inc; Austin (TX); On-site; USD 150,000 - 230,000; Full time

Job summary

Synopsys is seeking a senior emulation verification engineer to lead technical engagements with customers deploying ZeBu and other platforms, diagnose performance bottlenecks, and design practical verification workflows.

You’ll collaborate with R&D, deliver training, mentor junior engineers, and drive adoption of scalable emulation strategies across complex SoCs. 10+ years in hardware emulation required.

Qualifications

• 10+ years hands‑on experience with hardware emulation platforms (ZeBu, Veloce, Palladium).
• Deep RTL knowledge: Verilog/SystemVerilog/VHDL; ability to read and optimize RTL for emulation.
• Strong expertise in UVM, constrained random testing, and coverage-driven verification.

Responsibilities

• Lead technical engagements with customers deploying ZeBu or other emulation platforms.
• Design emulation strategies for complex SoC/ASIC projects and bring‑up sequences.
• Collaborate with Synopsys R&D to validate new features against customer use cases.
• Develop and deliver technical training sessions and best practices.
• Troubleshoot emulation failures across hardware, RTL, testbench, and software layers.
• Mentor junior applications engineers in emulation methodologies and customer engagement.

Skills

ZeBu

VHDL

SystemVerilog

Verilog

UVM

RTL debugging

Python

Tools

Mentor Veloce

Cadence Palladium

Xcelium

Job description

Synopsys is seeking a senior emulation verification engineer to lead technical engagements with customers deploying ZeBu and other platforms, diagnose performance bottlenecks, and design practical verification workflows.

You’ll collaborate with R&D, deliver training, mentor junior engineers, and drive adoption of scalable emulation strategies across complex SoCs. 10+ years in hardware emulation required.